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Searched refs:DPIO_CH1 (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_dpio_phy.c169 [DPIO_CH1] = { .port = PORT_C },
256 port == phy_info->channel[DPIO_CH1].port) { in bxt_port_to_phy_channel()
258 *ch = DPIO_CH1; in bxt_port_to_phy_channel()
808 !chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, true); in chv_phy_pre_pll_enable()
823 if (ch == DPIO_CH1) in chv_phy_pre_pll_enable()
831 if (ch == DPIO_CH1) in chv_phy_pre_pll_enable()
956 chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, false); in chv_phy_release_cl2_override()
Dintel_display_power.c1549 PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) | in assert_chv_phy_status()
1550 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) | in assert_chv_phy_status()
1551 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1)); in assert_chv_phy_status()
1565 if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1)) == 0) in assert_chv_phy_status()
1566 phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1); in assert_chv_phy_status()
1571 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1580 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)) && in assert_chv_phy_status()
1582 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1); in assert_chv_phy_status()
1592 PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1593 phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0); in assert_chv_phy_status()
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Dintel_display_types.h1720 return DPIO_CH1; in vlv_dig_port_to_channel()
1748 return DPIO_CH1; in vlv_pipe_to_channel()
Dintel_display.h280 DPIO_CH1 enumerator
/Linux-v5.15/drivers/gpu/drm/i915/gvt/
Dhandlers.c559 ch = DPIO_CH1; in bxt_vgpu_get_dp_bitrate()
3537 MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
3538 MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
3539 MMIO_D(BXT_PORT_PCS_DW10_LN01(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
3540 MMIO_D(BXT_PORT_PCS_DW10_GRP(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
3541 MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
3542 MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
3543 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1), D_BXT, in init_bxt_mmio_info()
3545 MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
3546 MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
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