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Searched refs:DPG0_DPG_CONTROL__DPG_VRES_MASK (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h13625 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_2_1_0_sh_mask.h25508 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_1_sh_mask.h21719 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_2_sh_mask.h27922 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_2_sh_mask.h24742 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_2_0_0_sh_mask.h28857 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_0_sh_mask.h27975 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro