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Searched refs:DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5801 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK 0x04000000L macro
Ddce_8_0_sh_mask.h7957 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK 0x4000000 macro
Ddce_11_0_sh_mask.h6887 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK 0x4000000 macro
Ddce_10_0_sh_mask.h6985 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK 0x4000000 macro
Ddce_11_2_sh_mask.h7959 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK 0x4000000 macro
Ddce_12_0_sh_mask.h4913 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h1535 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK … macro
Ddcn_2_1_0_sh_mask.h2381 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK … macro
Ddcn_3_0_1_sh_mask.h2522 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK … macro
Ddcn_1_0_sh_mask.h3875 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK … macro
Ddcn_3_1_2_sh_mask.h1998 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK … macro
Ddcn_3_0_2_sh_mask.h2452 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK … macro
Ddcn_2_0_0_sh_mask.h2649 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK … macro
Ddcn_3_0_0_sh_mask.h2518 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED_MASK … macro