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Searched refs:DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5676 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT 0x00000000 macro
Ddce_8_0_sh_mask.h7752 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT 0x0 macro
Ddce_11_0_sh_mask.h6690 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT 0x0 macro
Ddce_10_0_sh_mask.h6796 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT 0x0 macro
Ddce_11_2_sh_mask.h7770 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT 0x0 macro
Ddce_12_0_sh_mask.h4704 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h1382 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT … macro
Ddcn_2_1_0_sh_mask.h2180 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT … macro
Ddcn_3_0_1_sh_mask.h2325 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT … macro
Ddcn_1_0_sh_mask.h3674 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT … macro
Ddcn_3_1_2_sh_mask.h1797 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT … macro
Ddcn_3_0_2_sh_mask.h2251 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT … macro
Ddcn_2_0_0_sh_mask.h2448 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT … macro
Ddcn_3_0_0_sh_mask.h2317 #define DMCU_ERAM_WR_CTRL__ERAM_WR_ADDR__SHIFT … macro