Searched refs:DMA_CSR (Results 1 – 5 of 5) sorted by relevance
/Linux-v5.15/drivers/scsi/ |
D | sun_esp.c | 57 switch (dma_read32(DMA_CSR) & DMA_DEVICE_ID) { in esp_sbus_setup_dma() 216 if (dma_read32(DMA_CSR) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)) in sbus_esp_irq_pending() 239 val = dma_read32(DMA_CSR); in sbus_esp_reset_dma() 240 dma_write32(val | DMA_RST_SCSI, DMA_CSR); in sbus_esp_reset_dma() 241 dma_write32(val & ~DMA_RST_SCSI, DMA_CSR); in sbus_esp_reset_dma() 245 dma_write32(DMA_RESET_FAS366, DMA_CSR); in sbus_esp_reset_dma() 246 dma_write32(DMA_RST_SCSI, DMA_CSR); in sbus_esp_reset_dma() 265 while (dma_read32(DMA_CSR) & DMA_PEND_READ) { in sbus_esp_reset_dma() 275 dma_write32(0, DMA_CSR); in sbus_esp_reset_dma() 276 dma_write32(esp->prev_hme_dmacsr, DMA_CSR); in sbus_esp_reset_dma() [all …]
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D | sun3x_esp.c | 23 #define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ macro 66 if (dma_read32(DMA_CSR) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)) in sun3x_esp_irq_pending() 75 val = dma_read32(DMA_CSR); in sun3x_esp_reset_dma() 76 dma_write32(val | DMA_RST_SCSI, DMA_CSR); in sun3x_esp_reset_dma() 77 dma_write32(val & ~DMA_RST_SCSI, DMA_CSR); in sun3x_esp_reset_dma() 80 val = dma_read32(DMA_CSR); in sun3x_esp_reset_dma() 81 dma_write32(val | DMA_INT_ENAB, DMA_CSR); in sun3x_esp_reset_dma() 89 csr = dma_read32(DMA_CSR); in sun3x_esp_dma_drain() 93 dma_write32(csr | DMA_FIFO_STDRAIN, DMA_CSR); in sun3x_esp_dma_drain() 96 while (dma_read32(DMA_CSR) & DMA_FIFO_ISDRAIN) { in sun3x_esp_dma_drain() [all …]
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/Linux-v5.15/drivers/dma/ |
D | iop-adma.h | 13 #define DMA_CSR(chan) (chan->mmr_base + 0x4) macro 280 u32 status = __raw_readl(DMA_CSR(chan)); in iop_chan_is_busy() 804 return __raw_readl(DMA_CSR(chan)); in iop_chan_get_status() 824 u32 status = __raw_readl(DMA_CSR(chan)); in iop_adma_device_clear_eot_status() 826 __raw_writel(status, DMA_CSR(chan)); in iop_adma_device_clear_eot_status() 831 u32 status = __raw_readl(DMA_CSR(chan)); in iop_adma_device_clear_eoc_status() 833 __raw_writel(status, DMA_CSR(chan)); in iop_adma_device_clear_eoc_status() 838 u32 status = __raw_readl(DMA_CSR(chan)); in iop_adma_device_clear_err_status() 852 __raw_writel(status, DMA_CSR(chan)); in iop_adma_device_clear_err_status()
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/Linux-v5.15/drivers/net/ethernet/amd/ |
D | sunlance.c | 436 u32 csr = sbus_readl(lp->dregs + DMA_CSR); in init_restart_ledma() 440 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) in init_restart_ledma() 444 csr = sbus_readl(lp->dregs + DMA_CSR); in init_restart_ledma() 458 sbus_writel(csr, lp->dregs + DMA_CSR); in init_restart_ledma() 485 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR)); in init_restart_lance() 494 u32 csr = sbus_readl(lp->dregs + DMA_CSR); in init_restart_lance() 497 sbus_writel(csr, lp->dregs + DMA_CSR); in init_restart_lance() 856 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR); in lance_interrupt() 859 sbus_writel(dma_csr, lp->dregs + DMA_CSR); in lance_interrupt() 986 csr = sbus_readl(lp->dregs + DMA_CSR); in lance_reset() [all …]
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/Linux-v5.15/arch/sparc/include/asm/ |
D | dma.h | 18 #define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ macro
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