Searched refs:DKL_PLL_DIV0 (Results 1 – 2 of 2) sorted by relevance
3447 hw_state->mg_pll_div0 = intel_de_read(dev_priv, DKL_PLL_DIV0(tc_port)); in dkl_pll_get_hw_state()3667 val = intel_de_read(dev_priv, DKL_PLL_DIV0(tc_port)); in dkl_pll_write()3673 intel_de_write(dev_priv, DKL_PLL_DIV0(tc_port), val); in dkl_pll_write()
10881 #define DKL_PLL_DIV0(tc_port) _MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \ macro
