Searched refs:DISPLAY_PLANE_ENABLE (Results 1 – 11 of 11) sorted by relevance
359 dspcntr |= DISPLAY_PLANE_ENABLE; in oaktrail_crtc_hdmi_mode_set()393 if ((temp & DISPLAY_PLANE_ENABLE) != 0) { in oaktrail_crtc_hdmi_dpms()394 REG_WRITE(DSPBCNTR, temp & ~DISPLAY_PLANE_ENABLE); in oaktrail_crtc_hdmi_dpms()461 if ((temp & DISPLAY_PLANE_ENABLE) == 0) { in oaktrail_crtc_hdmi_dpms()462 REG_WRITE(DSPBCNTR, temp | DISPLAY_PLANE_ENABLE); in oaktrail_crtc_hdmi_dpms()
269 if ((temp & DISPLAY_PLANE_ENABLE) == 0) { in oaktrail_crtc_dpms()271 temp | DISPLAY_PLANE_ENABLE, in oaktrail_crtc_dpms()295 if ((temp & DISPLAY_PLANE_ENABLE) != 0) { in oaktrail_crtc_dpms()297 temp & ~DISPLAY_PLANE_ENABLE, i); in oaktrail_crtc_dpms()
233 if ((temp & DISPLAY_PLANE_ENABLE) == 0) { in gma_crtc_dpms()235 temp | DISPLAY_PLANE_ENABLE); in gma_crtc_dpms()282 if ((temp & DISPLAY_PLANE_ENABLE) != 0) { in gma_crtc_dpms()284 temp & ~DISPLAY_PLANE_ENABLE); in gma_crtc_dpms()
201 dspcntr |= DISPLAY_PLANE_ENABLE; in psb_intel_crtc_mode_set()
592 #define DISPLAY_PLANE_ENABLE (1 << 31) macro
713 dspcntr |= DISPLAY_PLANE_ENABLE; in cdv_intel_crtc_mode_set()
188 vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE; in emulate_monitor_status_change()499 vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE; in emulate_monitor_status_change()
214 plane->enabled = !!(val & DISPLAY_PLANE_ENABLE); in intel_vgpu_decode_primary_plane()
164 dspcntr = DISPLAY_PLANE_ENABLE; in i9xx_plane_ctl()672 ret = val & DISPLAY_PLANE_ENABLE; in i9xx_plane_get_hw_state()
12719 DISPLAY_PLANE_ENABLE); in i830_disable_pipe()12722 DISPLAY_PLANE_ENABLE); in i830_disable_pipe()12725 DISPLAY_PLANE_ENABLE); in i830_disable_pipe()
6712 #define DISPLAY_PLANE_ENABLE (1 << 31) macro
