Searched refs:DG1_MSTR_TILE_INTR (Results 1 – 2 of 2) sorted by relevance
2740 raw_reg_write(regs, DG1_MSTR_TILE_INTR, 0); in dg1_master_intr_disable()2743 val = raw_reg_read(regs, DG1_MSTR_TILE_INTR); in dg1_master_intr_disable()2747 raw_reg_write(regs, DG1_MSTR_TILE_INTR, val); in dg1_master_intr_disable()2754 raw_reg_write(regs, DG1_MSTR_TILE_INTR, DG1_MSTR_IRQ); in dg1_master_intr_enable()3890 intel_uncore_posting_read(&dev_priv->uncore, DG1_MSTR_TILE_INTR); in dg1_irq_postinstall()
8031 #define DG1_MSTR_TILE_INTR _MMIO(0x190008) macro
