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Searched refs:DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK (Results 1 – 15 of 15) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5227 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK 0x00000003L macro
Ddce_8_0_sh_mask.h2887 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK 0x3 macro
Ddce_11_0_sh_mask.h2699 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK 0x3 macro
Ddce_10_0_sh_mask.h2685 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK 0x3 macro
Ddce_11_2_sh_mask.h2939 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK 0x3 macro
Ddce_12_0_sh_mask.h9003 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h21161 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro
Ddcn_2_1_0_sh_mask.h43055 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro
Ddcn_3_0_1_sh_mask.h35755 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro
Ddcn_1_0_sh_mask.h39749 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro
Ddcn_3_1_2_sh_mask.h44472 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro
Ddcn_3_0_2_sh_mask.h42341 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro
Ddcn_2_0_0_sh_mask.h48534 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro
Ddcn_3_0_0_sh_mask.h48906 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_4_2_0_sh_mask.h3510 #define DC_REF_CLK_CNTL__HSYNCA_OUTPUT_SEL_MASK … macro