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Searched refs:D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h2535 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x00000100L macro
Ddce_8_0_sh_mask.h11045 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x100 macro
Ddce_11_0_sh_mask.h11241 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x100 macro
Ddce_10_0_sh_mask.h11429 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x100 macro
Ddce_11_2_sh_mask.h12495 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK 0x100 macro
Ddce_12_0_sh_mask.h2286 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h323 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
Ddcn_2_1_0_sh_mask.h233 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
Ddcn_3_0_1_sh_mask.h630 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
Ddcn_1_0_sh_mask.h1732 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
Ddcn_3_1_2_sh_mask.h7278 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
Ddcn_3_0_2_sh_mask.h336 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
Ddcn_2_0_0_sh_mask.h336 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro
Ddcn_3_0_0_sh_mask.h316 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT_MASK … macro