Searched refs:Counter (Results 1 – 25 of 57) sorted by relevance
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19 typedef u_long Counter ; typedef29 Counter count ;195 Counter fddiMACFrame_Ct ;196 Counter fddiMACCopied_Ct ;197 Counter fddiMACTransmit_Ct ;198 Counter fddiMACToken_Ct ;199 Counter fddiMACError_Ct ;200 Counter fddiMACLost_Ct ;201 Counter fddiMACTvxExpired_Ct ;202 Counter fddiMACNotCopied_Ct ;[all …]
4 Generic Counter Interface10 Counter devices are prevalent among a diverse spectrum of industries.15 Generic Counter interface enables drivers to support and expose a common21 Counter devices can vary greatly in design, but regardless of whether25 the Generic Counter interface.45 When the Signal data is available for user access, the Generic Counter64 count data. The Generic Counter interface provides the following83 context of the Generic Counter interface, a counter consists of Counts94 Counter interface represents the count data as a natural number.97 for the count data. The Generic Counter interface provides the following[all …]
3 # Counter devices7 tristate "Counter support"9 This enables counter device support through the Generic Counter84 tristate "Microchip Timer Counter Capture driver"88 Select this option to enable the Microchip Timer Counter Block
12 The Counter Enable signal CNT_EN is used54 | Prescaler +-> | Counter | +-> | Master | TRGO(2)127 Counter is always ON.
220 the Counter. This should match the name of the device as it228 belonging to the Counter.235 belonging to the Counter.
1 OMAP Counter-32K bindings
1 * Cirrus Logic CLPS711X Timer Counter
4 Ingenic JZ47xx SoCs Timer/Counter Unit hardware7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
51 /* 64-bit Global Free Running Counter */
26 load_mem_type_cnt = collections.Counter()
30 - Counter value for the rpmb device will be read to stdout.
14 CR 0 (Recovery Counter) used for ptrace81 R (Recovery Counter trap) 0
83 Support the clocks of the Timer/Counter Unit (TCU) of the Ingenic
34 [Fixed Counter: Counts the number of instructions retired. Unit: cpu_atom]36 [Number of instructions retired. Fixed Counter - architectural event. Unit: cpu_core]
29 14 counter Counter
28 : CC_INT_CALIB : : Coulomb Counter Internal Calibration29 : CCEOC : : Coulomb Counter End of Conversion
57 Counter on/off registers.
168 Bit 3 = Counter 2169 Bit 2 = Counter 1170 Bit 1 = Counter 0175 Bit 3 = Counter 2176 Bit 2 = Counter 1177 Bit 1 = Counter 0
11 is one register for each counter. Counter 0 is special in that it always counts
67 Provides support for the ARM SMMUv3 Performance Monitor Counter
148 bool "Timer Counter Blocks (TCB) support"
25 amounts of time (with interrupts disabled), polling the CPU Time Stamp Counter
59 tristate "Counter 1-wire device (DS2423)"
123 | 8:50 | Counter Address |
152 | Directions | Pin# | Counter bits |
