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Searched refs:CSR0_STOP (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.15/drivers/net/ethernet/amd/
Dsun3lance.c214 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
329 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP; in lance_probe()
331 if(ioaddr_probe[0] != CSR0_STOP) { in lance_probe()
356 REGA(CSR0) = CSR0_STOP; in lance_probe()
421 REGA(CSR0) = CSR0_STOP; in lance_open()
435 DREG = CSR0_STOP; in lance_open()
530 DREG = CSR0_STOP; in lance_start_xmit()
587 REGA( CSR0 ) = CSR0_STOP; in lance_start_xmit()
705 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
743 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
[all …]
Datarilance.c314 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
506 ioaddr[0] = CSR0_INIT | CSR0_STOP; in lance_probe1()
507 if (ioaddr[0] != CSR0_STOP) { in lance_probe1()
513 ioaddr[0] = CSR0_STOP; in lance_probe1()
514 if (ioaddr[0] != CSR0_STOP) { in lance_probe1()
534 REGA( CSR0 ) = CSR0_STOP; in lance_probe1()
661 DREG = CSR0_STOP; in lance_open()
734 DREG = CSR0_STOP; in lance_tx_timeout()
869 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | in lance_interrupt()
1055 DREG = CSR0_STOP; in lance_close()
[all …]
Dni65.h32 #define CSR0_STOP 0x0004 /* Stop (RS) */ macro
Dpcnet32.c195 #define CSR0_STOP 0x4 macro
763 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_set_link_ksettings()
889 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_set_ringparam()
985 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_loopback_test()
999 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
1072 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
1440 if (!(csr0 & CSR0_STOP)) /* If not stopped */ in pcnet32_get_regs()
1477 if (!(csr0 & CSR0_STOP)) /* If not stopped */ in pcnet32_get_regs()
2419 if (lp->a->read_csr(ioaddr, CSR0) & CSR0_STOP) in pcnet32_restart()
2450 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_tx_timeout()
[all …]
Dni65.c273 writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */ in ni65_set_performance()
574 writereg(CSR0_CLRALL|CSR0_STOP,CSR0); in ni65_init_lance()
723 writedatareg(CSR0_STOP); in ni65_stop_start()