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Searched refs:CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c4998 data = (0x0100 << CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT) | in gfx_v9_0_update_3d_clock_gating()
5052 data = (0x0100 << CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT) | in gfx_v9_0_update_coarse_grain_clock_gating()
Dgfx_v10_0.c8014 data = (0x0100 << CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT) | in gfx_v10_0_update_3d_clock_gating()
8074 data = (0x0100 << CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT) | in gfx_v10_0_update_coarse_grain_clock_gating()
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2849 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x00000000 macro
Dgfx_7_2_sh_mask.h3080 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h3694 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h4216 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0 macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h1217 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT … macro
Dgc_9_1_sh_mask.h1116 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT … macro
Dgc_9_2_1_sh_mask.h1083 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT … macro
Dgc_9_4_2_sh_mask.h1716 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT … macro
Dgc_10_3_0_sh_mask.h6971 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT … macro
Dgc_10_1_0_sh_mask.h6705 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT … macro