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Searched refs:CPF_EDC_ROQ_CNT__SEC_COUNT_ME1__SHIFT (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_1_sh_mask.h32 #define CPF_EDC_ROQ_CNT__SEC_COUNT_ME1__SHIFT … macro
Dgc_9_4_2_sh_mask.h3513 #define CPF_EDC_ROQ_CNT__SEC_COUNT_ME1__SHIFT … macro