Searched refs:CLK_TOP_SENINF2_SEL (Results 1 – 2 of 2) sorted by relevance
| /Linux-v5.15/include/dt-bindings/clock/ | ||
| D | mt8192-clk.h | 51 #define CLK_TOP_SENINF2_SEL 39 macro |
| /Linux-v5.15/drivers/clk/mediatek/ | ||
| D | clk-mt8192.c | 799 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF2_SEL, "seninf2_sel", |