Searched refs:CLK_PLL2_FIN (Results 1 – 1 of 1) sorted by relevance
2506 #define CLK_PLL2_FIN 48000000 macro2658 CLK_PLL2_FIN); in rt5682_wclk_set_rate()2660 if (parent_rate != CLK_PLL2_FIN) in rt5682_wclk_set_rate()2662 clk_name, CLK_PLL2_FIN); in rt5682_wclk_set_rate()2670 CLK_PLL2_FIN, clk_pll2_out); in rt5682_wclk_set_rate()
