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Searched refs:BrateCfg (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.15/drivers/staging/r8188eu/hal/
Dusb_halinit.c1388 u16 BrateCfg = 0; in SetHwReg8188EU() local
1395 HalSetBrateCfg(Adapter, val, &BrateCfg); in SetHwReg8188EU()
1396 DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); in SetHwReg8188EU()
1403 BrateCfg = (BrateCfg | 0xd) & 0x15d; in SetHwReg8188EU()
1404 haldata->BasicRateSet = BrateCfg; in SetHwReg8188EU()
1406 BrateCfg |= 0x01; /* default enable 1M ACK rate */ in SetHwReg8188EU()
1408 rtw_write8(Adapter, REG_RRSR, BrateCfg & 0xff); in SetHwReg8188EU()
1409 rtw_write8(Adapter, REG_RRSR + 1, (BrateCfg >> 8) & 0xff); in SetHwReg8188EU()
1413 while (BrateCfg > 0x1) { in SetHwReg8188EU()
1414 BrateCfg = (BrateCfg >> 1); in SetHwReg8188EU()
/Linux-v5.15/drivers/staging/rtl8723bs/hal/
Drtl8723b_hal_init.c3280 u16 BrateCfg = 0; in SetHwReg8723B() local
3284 HalSetBrateCfg(padapter, val, &BrateCfg); in SetHwReg8723B()
3287 BrateCfg |= rrsr_2g_force_mask; in SetHwReg8723B()
3288 BrateCfg &= rrsr_2g_allow_mask; in SetHwReg8723B()
3293 if ((BrateCfg & (RRSR_24M|RRSR_12M|RRSR_6M)) == 0) in SetHwReg8723B()
3294 BrateCfg |= RRSR_6M; in SetHwReg8723B()
3297 pHalData->BasicRateSet = BrateCfg; in SetHwReg8723B()
3300 rtw_write16(padapter, REG_RRSR, BrateCfg); in SetHwReg8723B()