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Searched refs:BXT_PORT_PLL (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.c1901 temp = intel_de_read(dev_priv, BXT_PORT_PLL(phy, ch, 0)); in bxt_ddi_pll_enable()
1904 intel_de_write(dev_priv, BXT_PORT_PLL(phy, ch, 0), temp); in bxt_ddi_pll_enable()
1907 temp = intel_de_read(dev_priv, BXT_PORT_PLL(phy, ch, 1)); in bxt_ddi_pll_enable()
1910 intel_de_write(dev_priv, BXT_PORT_PLL(phy, ch, 1), temp); in bxt_ddi_pll_enable()
1913 temp = intel_de_read(dev_priv, BXT_PORT_PLL(phy, ch, 2)); in bxt_ddi_pll_enable()
1916 intel_de_write(dev_priv, BXT_PORT_PLL(phy, ch, 2), temp); in bxt_ddi_pll_enable()
1919 temp = intel_de_read(dev_priv, BXT_PORT_PLL(phy, ch, 3)); in bxt_ddi_pll_enable()
1922 intel_de_write(dev_priv, BXT_PORT_PLL(phy, ch, 3), temp); in bxt_ddi_pll_enable()
1925 temp = intel_de_read(dev_priv, BXT_PORT_PLL(phy, ch, 6)); in bxt_ddi_pll_enable()
1930 intel_de_write(dev_priv, BXT_PORT_PLL(phy, ch, 6), temp); in bxt_ddi_pll_enable()
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/gvt/
Dhandlers.c574 clock.m2 = (vgpu_vreg_t(vgpu, BXT_PORT_PLL(phy, ch, 0)) & PORT_PLL_M2_MASK) << 22; in bxt_vgpu_get_dp_bitrate()
575 if (vgpu_vreg_t(vgpu, BXT_PORT_PLL(phy, ch, 3)) & PORT_PLL_M2_FRAC_ENABLE) in bxt_vgpu_get_dp_bitrate()
576 clock.m2 |= vgpu_vreg_t(vgpu, BXT_PORT_PLL(phy, ch, 2)) & PORT_PLL_M2_FRAC_MASK; in bxt_vgpu_get_dp_bitrate()
577 clock.n = (vgpu_vreg_t(vgpu, BXT_PORT_PLL(phy, ch, 1)) & PORT_PLL_N_MASK) >> PORT_PLL_N_SHIFT; in bxt_vgpu_get_dp_bitrate()
3528 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 0), D_BXT); in init_bxt_mmio_info()
3529 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 1), D_BXT); in init_bxt_mmio_info()
3530 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 2), D_BXT); in init_bxt_mmio_info()
3531 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 3), D_BXT); in init_bxt_mmio_info()
3532 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 6), D_BXT); in init_bxt_mmio_info()
3533 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 8), D_BXT); in init_bxt_mmio_info()
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/
Di915_reg.h1853 #define BXT_PORT_PLL(phy, ch, idx) _MMIO(_PORT_PLL_BASE(phy, ch) + \ macro