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Searched refs:ATTR05__ATTR_PAL__SHIFT (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h391 #define ATTR05__ATTR_PAL__SHIFT 0x00000000 macro
Ddce_8_0_sh_mask.h10888 #define ATTR05__ATTR_PAL__SHIFT 0x0 macro
Ddce_11_0_sh_mask.h11084 #define ATTR05__ATTR_PAL__SHIFT 0x0 macro
Ddce_10_0_sh_mask.h11272 #define ATTR05__ATTR_PAL__SHIFT 0x0 macro
Ddce_11_2_sh_mask.h12338 #define ATTR05__ATTR_PAL__SHIFT 0x0 macro
Ddce_12_0_sh_mask.h64731 #define ATTR05__ATTR_PAL__SHIFT … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h27452 #define ATTR05__ATTR_PAL__SHIFT … macro
Ddcn_2_1_0_sh_mask.h48756 #define ATTR05__ATTR_PAL__SHIFT … macro
Ddcn_3_0_1_sh_mask.h45479 #define ATTR05__ATTR_PAL__SHIFT … macro
Ddcn_1_0_sh_mask.h46392 #define ATTR05__ATTR_PAL__SHIFT … macro
Ddcn_3_1_2_sh_mask.h52871 #define ATTR05__ATTR_PAL__SHIFT … macro
Ddcn_3_0_2_sh_mask.h54496 #define ATTR05__ATTR_PAL__SHIFT … macro
Ddcn_2_0_0_sh_mask.h60003 #define ATTR05__ATTR_PAL__SHIFT … macro
Ddcn_3_0_0_sh_mask.h63071 #define ATTR05__ATTR_PAL__SHIFT … macro