Searched refs:ARM64_FEATURE_MASK (Results 1 – 2 of 2) sorted by relevance
1072 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_SVE); in read_id_reg()1073 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_AMU); in read_id_reg()1074 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_CSV2); in read_id_reg()1075 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV2), (u64)vcpu->kvm->arch.pfr0_csv2); in read_id_reg()1076 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_CSV3); in read_id_reg()1077 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV3), (u64)vcpu->kvm->arch.pfr0_csv3); in read_id_reg()1080 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_MTE); in read_id_reg()1086 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR1_MTE), mte); in read_id_reg()1091 val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_APA) | in read_id_reg()1092 ARM64_FEATURE_MASK(ID_AA64ISAR1_API) | in read_id_reg()[all …]
1191 #define ARM64_FEATURE_MASK(x) (GENMASK_ULL(x##_SHIFT + ARM64_FEATURE_FIELD_BITS - 1, x##_SHIFT)) macro
