Searched refs:AMD_CG_SUPPORT_HDP_MGCG (Results 1 – 9 of 9) sorted by relevance
150 if (!(adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) in hdp_v5_0_update_medium_grain_clock_gating()196 *flags |= AMD_CG_SUPPORT_HDP_MGCG; in hdp_v5_0_get_clockgating_state()
1514 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1530 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1552 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1575 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1598 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1644 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1670 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1806 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) in vi_update_hdp_medium_grain_clock_gating()1909 if (adev->cg_flags & (AMD_CG_SUPPORT_HDP_LS | AMD_CG_SUPPORT_HDP_MGCG)) { in vi_common_set_clockgating_state_by_smu()1914 if (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG) { in vi_common_set_clockgating_state_by_smu()[all …]
1064 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()1086 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()1110 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()1140 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()1165 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()1208 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()1225 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()1248 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()
1198 AMD_CG_SUPPORT_HDP_MGCG | in soc15_common_early_init()1221 AMD_CG_SUPPORT_HDP_MGCG | in soc15_common_early_init()1289 AMD_CG_SUPPORT_HDP_MGCG | in soc15_common_early_init()1309 AMD_CG_SUPPORT_HDP_MGCG | in soc15_common_early_init()
2050 AMD_CG_SUPPORT_HDP_MGCG; in cik_common_early_init()2070 AMD_CG_SUPPORT_HDP_MGCG; in cik_common_early_init()2089 AMD_CG_SUPPORT_HDP_MGCG; in cik_common_early_init()2125 AMD_CG_SUPPORT_HDP_MGCG; in cik_common_early_init()
2059 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()2080 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()2101 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()2121 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()2139 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()
896 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) in gmc_v7_0_enable_hdp_mgcg()
133 #define AMD_CG_SUPPORT_HDP_MGCG (1 << 16) macro
60 {AMD_CG_SUPPORT_HDP_MGCG, "Host Data Path Medium Grain Clock Gating"},