Searched refs:AMDGPU_NUM_VMID (Results 1 – 15 of 15) sorted by relevance
34 #define AMDGPU_NUM_VMID 16 macro69 struct amdgpu_vmid ids[AMDGPU_NUM_VMID];
609 for (j = 0; j < AMDGPU_NUM_VMID; ++j) { in amdgpu_vmid_mgr_fini()
452 for (i = 0; i < AMDGPU_NUM_VMID; i++) in mmhub_v2_0_gart_disable()
379 for (i = 0; i < AMDGPU_NUM_VMID; i++) in mmhub_v2_3_gart_disable()
121 ((1 << AMDGPU_NUM_VMID) - 1) - in amdgpu_amdkfd_device_init()
346 for (i = 0; i < AMDGPU_NUM_VMID; i++) in mmhub_v1_0_gart_disable()
534 for (i = 1; i < AMDGPU_NUM_VMID; i++) { in gmc_v6_0_gart_enable()
444 for (vmid = 1; vmid < AMDGPU_NUM_VMID; vmid++) { in gmc_v10_0_flush_gpu_tlb_pasid()
681 for (i = 1; i < AMDGPU_NUM_VMID; i++) { in gmc_v7_0_gart_enable()
1868 for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) { in gfx_v7_0_init_compute_vmid()1881 for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) { in gfx_v7_0_init_compute_vmid()1899 for (vmid = 1; vmid < AMDGPU_NUM_VMID; vmid++) { in gfx_v7_0_init_gds_vmid()
914 for (i = 1; i < AMDGPU_NUM_VMID; i++) { in gmc_v8_0_gart_enable()
407 for (i = 0; i < AMDGPU_NUM_VMID; i++) in mmhub_v9_4_gart_disable()
3721 for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) { in gfx_v8_0_init_compute_vmid()3734 for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) { in gfx_v8_0_init_compute_vmid()3752 for (vmid = 1; vmid < AMDGPU_NUM_VMID; vmid++) { in gfx_v8_0_init_gds_vmid()
2558 for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) { in gfx_v9_0_init_compute_vmid()2569 for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) { in gfx_v9_0_init_compute_vmid()2587 for (vmid = 1; vmid < AMDGPU_NUM_VMID; vmid++) { in gfx_v9_0_init_gds_vmid()
5142 for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) { in gfx_v10_0_init_compute_vmid()5153 for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) { in gfx_v10_0_init_compute_vmid()5171 for (vmid = 1; vmid < AMDGPU_NUM_VMID; vmid++) { in gfx_v10_0_init_gds_vmid()