Searched refs:AMDGPU_MAX_RINGS (Results 1 – 10 of 10) sorted by relevance
549 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_fini()579 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_sw_fini()612 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_init()748 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_fence_info_show()
334 unsigned seqno[AMDGPU_MAX_RINGS];345 struct drm_gpu_scheduler *vm_pte_scheds[AMDGPU_MAX_RINGS];
1214 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1230 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1431 if (val >= AMDGPU_MAX_RINGS) in amdgpu_debugfs_ib_preempt()1579 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_init()
188 if (adev->num_rings >= AMDGPU_MAX_RINGS) in amdgpu_ring_init()
3439 adev->fence_context = dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_device_init()4342 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_has_job_running()4479 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_pre_asic_reset()4848 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_recheck_guilty_jobs()5049 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()5120 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()5370 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_cancel_all_tdr()5423 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_error_detected()5550 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_resume()
32 #define AMDGPU_MAX_RINGS 28 macro
935 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
3209 dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_vm_manager_init()3210 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_vm_manager_init()
1565 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_pmops_runtime_suspend()
1476 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_pm_compute_clocks()
