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Searched refs:A17 (Results 1 – 25 of 27) sorted by relevance

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/Linux-v5.15/Documentation/hwmon/
Ddell-smm-hwmon.rst132 1.0 A17 2J59L02 52 2 1 8040 6420 1 2
136 1.0 A17 2J59L02 52 2 1 8040 6420 1 2
/Linux-v5.15/arch/arm/boot/dts/
Dam335x-boneblue.dts161 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE1) /* (A17) spi0_sclk.uart2_rxd */
442 "UART2_RX", /* A17 */
Dsama5d3.dtsi936 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
/Linux-v5.15/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g4.c253 #define A17 27 macro
254 SIG_EXPR_LIST_DECL_SINGLE(A17, SD2DAT1, SD2, SD2_DESC);
257 SIG_EXPR_LIST_DECL_DUAL(A17, GPID2OUT, GPID2, GPID);
258 PIN_DECL_2(A17, GPIOD3, SD2DAT1, GPID2OUT);
260 FUNC_GROUP_DECL(GPID2, B17, A17);
297 FUNC_GROUP_DECL(SD2, A18, D16, B17, A17, C16, B16, A16, E15);
298 FUNC_GROUP_DECL(GPID, A18, D16, B17, A17, C16, B16, A16, E15);
1916 ASPEED_PINCTRL_PIN(A17),
2535 ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, B17, A17, SCUA8, 21),
Dpinctrl-aspeed-g6.c503 #define A17 59 macro
504 SIG_EXPR_LIST_DECL_SESG(A17, SGPM1I, SGPM1, SIG_DESC_SET(SCU414, 27));
505 PIN_DECL_1(A17, GPIOH3, SGPM1I);
507 FUNC_GROUP_DECL(SGPM1, A18, B18, C18, A17);
1645 ASPEED_PINCTRL_PIN(A17),
2378 ASPEED_PULL_DOWN_PINCONF(A17, SCU614, 27),
Dpinctrl-aspeed-g5.c495 #define A17 60 macro
496 SIG_EXPR_LIST_DECL_SINGLE(A17, DASHA17, DASHA17, COND1, SIG_DESC_SET(SCU94, 7));
497 SIG_EXPR_LIST_DECL_SINGLE(A17, NDTR6, UART6, COND1, UART6_DESC);
498 PIN_DECL_2(A17, GPIOH4, DASHA17, NDTR6);
513 FUNC_GROUP_DECL(UART6, A18, B18, D17, C17, A17, B17, A16, D18);
1910 ASPEED_PINCTRL_PIN(A17),
/Linux-v5.15/arch/arm/
DKconfig1041 bool "ARM errata: A17: DMB ST might fail to create order between stores"
1044 This option enables the workaround for the 852421 Cortex-A17
1050 bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption"
1054 - Cortex-A17 852423: Execution of a sequence of instructions might
1056 any Cortex-A17 cores yet.
1062 bool "ARM errata: A17: CPU might deadlock under some very rare internal conditions"
1065 This option enables the workaround for the 857272 Cortex-A17 erratum.
1066 This erratum is not known to be fixed in any A17 revision.
/Linux-v5.15/arch/arm/mm/
Dproc-v7.S512 ldr r10, =0x00000c0e @ Cortex-A17 primary part number
/Linux-v5.15/drivers/pinctrl/renesas/
Dpfc-r8a77970.c180 #define IP2_7_4 FM(DU_DB7) F_(0, 0) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0…
466 PINMUX_IPSR_GPSR(IP2_7_4, A17),
Dpfc-r8a77980.c213 #define IP2_7_4 FM(DU_DB7) FM(MSIOF3_TXD) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0…
547 PINMUX_IPSR_GPSR(IP2_7_4, A17),
Dpfc-r8a77990.c92 #define GPSR1_17 F_(A17, IP5_3_0)
255 #define IP5_3_0 FM(A17) FM(MSIOF1_RXD) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA6_A) FM(DU_DB6) F_…
795 PINMUX_IPSR_GPSR(IP5_3_0, A17),
Dpfc-sh7734.c675 PINMUX_IPSR_GPSR(IP1_3_2, A17),
1398 GPIO_FN(A17), GPIO_FN(ST1_VCO_CLKIN), GPIO_FN(LCD_CL1_A),
Dpfc-r8a77950.c109 #define GPSR1_17 F_(A17, IP4_3_0)
287 #define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_…
851 PINMUX_IPSR_GPSR(IP4_3_0, A17),
Dpfc-r8a77951.c110 #define GPSR1_17 F_(A17, IP4_3_0)
288 #define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_…
858 PINMUX_IPSR_GPSR(IP4_3_0, A17),
Dpfc-r8a7796.c115 #define GPSR1_17 F_(A17, IP4_3_0)
293 #define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_…
862 PINMUX_IPSR_GPSR(IP4_3_0, A17),
Dpfc-r8a77965.c115 #define GPSR1_17 F_(A17, IP4_3_0)
293 #define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_…
864 PINMUX_IPSR_GPSR(IP4_3_0, A17),
Dpfc-sh7264.c1270 GPIO_FN(A17),
Dpfc-r8a779a0.c376 #define IP2SR1_7_4 FM(MSIOF1_SS2) FM(HTX3) FM(TX3) F_(0, 0) FM(DU_DG7) FM(A17) F_(0, 0) F_(0, 0) …
865 PINMUX_IPSR_GPSR(IP2SR1_7_4, A17),
Dpfc-r8a7792.c390 PINMUX_SINGLE(A17),
Dpfc-sh7757.c1609 GPIO_FN(A17),
Dpfc-sh7269.c1708 GPIO_FN(A17),
Dpfc-r8a7778.c585 PINMUX_IPSR_GPSR(IP0_28, A17),
Dpfc-r8a77470.c748 PINMUX_IPSR_GPSR(IP6_11_8, A17),
Dpfc-r8a7779.c595 PINMUX_SINGLE(A17),
Dpfc-r8a7794.c887 PINMUX_IPSR_GPSR(IP2_23_21, A17),

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