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Searched refs:writeq_relaxed (Results 1 – 25 of 38) sorted by relevance

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/Linux-v5.10/arch/arm64/include/asm/
Darch_gicv3.h123 #define gic_write_irouter(v, c) writeq_relaxed(v, c)
125 #define gic_write_lpir(v, c) writeq_relaxed(v, c)
130 #define gits_write_baser(v, c) writeq_relaxed(v, c)
133 #define gits_write_cbaser(v, c) writeq_relaxed(v, c)
135 #define gits_write_cwriter(v, c) writeq_relaxed(v, c)
138 #define gicr_write_propbaser(v, c) writeq_relaxed(v, c)
140 #define gicr_write_pendbaser(v, c) writeq_relaxed(v, c)
143 #define gicr_write_vpropbaser(v, c) writeq_relaxed(v, c)
146 #define gicr_write_vpendbaser(v, c) writeq_relaxed(v, c)
Dio.h128 #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)cpu_to_le64(v),(c))) macro
143 #define writeq(v,c) ({ __iowmb(); writeq_relaxed((v),(c)); })
/Linux-v5.10/drivers/net/ethernet/cavium/thunder/
Dthunder_xcv.c72 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
77 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
87 writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL); in xcv_init_hw()
94 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
102 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
106 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
130 writeq_relaxed(cfg, xcv->reg_base + XCV_CTL); in xcv_setup_link()
135 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_setup_link()
140 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_setup_link()
143 writeq_relaxed(0x01, xcv->reg_base + XCV_BATCH_CRD_RET); in xcv_setup_link()
[all …]
Dnic_main.c90 writeq_relaxed(val, nic->reg_base + offset); in nic_reg_write()
146 writeq_relaxed(msg[0], mbx_addr); in nic_send_msg_to_vf()
147 writeq_relaxed(msg[1], mbx_addr + 8); in nic_send_msg_to_vf()
149 writeq_relaxed(msg[1], mbx_addr + 8); in nic_send_msg_to_vf()
150 writeq_relaxed(msg[0], mbx_addr); in nic_send_msg_to_vf()
/Linux-v5.10/include/linux/
Dio-64-nonatomic-hi-lo.h54 #ifndef writeq_relaxed
55 #define writeq_relaxed hi_lo_writeq_relaxed macro
Dio-64-nonatomic-lo-hi.h54 #ifndef writeq_relaxed
55 #define writeq_relaxed lo_hi_writeq_relaxed macro
/Linux-v5.10/arch/arm64/kernel/
Dsmp_spin_table.c91 writeq_relaxed(__pa_symbol(secondary_holding_pen), release_addr); in smp_spin_table_cpu_prepare()
Dacpi_parking_protocol.c102 writeq_relaxed(__pa_symbol(secondary_entry), &mailbox->entry_point); in acpi_parking_protocol_cpu_boot()
/Linux-v5.10/drivers/perf/
Darm_smmuv3_pmu.c649 writeq_relaxed(doorbell, pmu->reg_base + SMMU_PMCG_IRQ_CFG0); in smmu_pmu_write_msi_msg()
662 writeq_relaxed(0, pmu->reg_base + SMMU_PMCG_IRQ_CFG0); in smmu_pmu_setup_msi()
703 writeq_relaxed(counter_present_mask, in smmu_pmu_reset()
705 writeq_relaxed(counter_present_mask, in smmu_pmu_reset()
707 writeq_relaxed(counter_present_mask, in smmu_pmu_reset()
Darm-cmn.c702 writeq_relaxed(CMN_CC_INIT, dtc->base + CMN_DT_PMCCNTR); in arm_cmn_read_cc()
769 writeq_relaxed(CMN_CC_INIT, cmn->dtc[i].base + CMN_DT_PMCCNTR); in arm_cmn_event_start()
777 writeq_relaxed(val, dn->pmu_base + CMN_DTM_WPn_VAL(wp_idx)); in arm_cmn_event_start()
778 writeq_relaxed(mask, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_start()
803 writeq_relaxed(0, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_stop()
804 writeq_relaxed(~0ULL, dn->pmu_base + CMN_DTM_WPn_VAL(wp_idx)); in arm_cmn_event_stop()
1098 writeq_relaxed(reg, xp->pmu_base + CMN_DTM_PMU_CONFIG); in arm_cmn_event_add()
1238 writeq_relaxed(0, xp->pmu_base + CMN_DTM_WPn_MASK(i)); in arm_cmn_init_dtm()
1239 writeq_relaxed(~0ULL, xp->pmu_base + CMN_DTM_WPn_VAL(i)); in arm_cmn_init_dtm()
/Linux-v5.10/include/asm-generic/
Dio.h303 #if defined(writeq) && !defined(writeq_relaxed)
304 #define writeq_relaxed writeq_relaxed macro
305 static inline void writeq_relaxed(u64 value, volatile void __iomem *addr) in writeq_relaxed() function
/Linux-v5.10/drivers/hwtracing/coresight/
Dcoresight-etm4x-core.c181 writeq_relaxed(config->addr_val[i], in etm4_enable_hw()
183 writeq_relaxed(config->addr_acc[i], in etm4_enable_hw()
187 writeq_relaxed(config->ctxid_pid[i], in etm4_enable_hw()
193 writeq_relaxed(config->vmid_val[i], in etm4_enable_hw()
1338 writeq_relaxed(state->trcacvr[i], in etm4_cpu_restore()
1340 writeq_relaxed(state->trcacatr[i], in etm4_cpu_restore()
1345 writeq_relaxed(state->trccidcvr[i], in etm4_cpu_restore()
1349 writeq_relaxed(state->trcvmidcvr[i], in etm4_cpu_restore()
/Linux-v5.10/arch/sh/include/asm/
Dio.h47 #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)ioswabq(v),c)) macro
57 #define writeq(v,a) ({ wmb(); writeq_relaxed((v),(a)); })
/Linux-v5.10/drivers/clocksource/
Dtimer-clint.c108 writeq_relaxed(clint_get_cycles64() + delta, r); in clint_clock_next_event()
/Linux-v5.10/drivers/bus/fsl-mc/
Dmc-sys.c109 writeq_relaxed(le64_to_cpu(cmd->params[i]), &portal->params[i]); in mc_write_command()
/Linux-v5.10/arch/riscv/include/asm/
Dmmio.h124 #define writeq_relaxed(v, c) ({ __io_rbw(); writeq_cpu((v), (c)); __io_raw(); }) macro
/Linux-v5.10/drivers/staging/gasket/
Dgasket_core.h588 writeq_relaxed(value, &dev->bar_data[bar].virt_base[location]); in gasket_dev_write_64()
/Linux-v5.10/drivers/hwtracing/intel_th/
Dsth.c45 writeq_relaxed(*(u64 *)payload, dest); in sth_iowrite()
/Linux-v5.10/drivers/iommu/arm/arm-smmu/
Darm-smmu-nvidia.c75 writeq_relaxed(val, reg); in nvidia_smmu_write_reg64()
/Linux-v5.10/arch/parisc/include/asm/
Dio.h220 #define writeq_relaxed(q, addr) writeq(q, addr) macro
/Linux-v5.10/arch/x86/include/asm/
Dio.h101 #define writeq_relaxed(v, a) __writeq(v, a) macro
/Linux-v5.10/drivers/iommu/arm/arm-smmu-v3/
Darm-smmu-v3.c2866 writeq_relaxed(doorbell, smmu->base + cfg[0]); in arm_smmu_write_msi_msg()
2878 writeq_relaxed(0, smmu->base + ARM_SMMU_GERROR_IRQ_CFG0); in arm_smmu_setup_msis()
2879 writeq_relaxed(0, smmu->base + ARM_SMMU_EVTQ_IRQ_CFG0); in arm_smmu_setup_msis()
2882 writeq_relaxed(0, smmu->base + ARM_SMMU_PRIQ_IRQ_CFG0); in arm_smmu_setup_msis()
3051 writeq_relaxed(smmu->strtab_cfg.strtab_base, in arm_smmu_device_reset()
3057 writeq_relaxed(smmu->cmdq.q.q_base, smmu->base + ARM_SMMU_CMDQ_BASE); in arm_smmu_device_reset()
3085 writeq_relaxed(smmu->evtq.q.q_base, smmu->base + ARM_SMMU_EVTQ_BASE); in arm_smmu_device_reset()
3101 writeq_relaxed(smmu->priq.q.q_base, in arm_smmu_device_reset()
/Linux-v5.10/arch/mips/include/asm/
Dio.h392 #define writeq_relaxed __relaxed_writeq in BUILDIO_MEM() macro
/Linux-v5.10/arch/sparc/include/asm/
Dio_64.h186 #define writeq_relaxed writeq macro
/Linux-v5.10/drivers/mmc/host/
Ddw_mmc.h477 writeq_relaxed((value), (dev)->regs + SDMMC_##reg)

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