| /Linux-v5.10/drivers/gpu/drm/omapdrm/dss/ |
| D | hdmi_wp.c | 20 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
22 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
44 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
46 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
49 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
51 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
53 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
56 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
58 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
61 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
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| D | hdmi.h | 239 struct hdmi_wp_data *wp; member
261 struct hdmi_wp_data *wp; member
296 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
297 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
298 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
299 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
300 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
301 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
302 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
303 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
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| D | hdmi5.c | 67 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
70 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
71 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
83 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
95 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
98 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
103 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
105 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
171 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); in hdmi_power_on_full()
172 hdmi_wp_set_irqstatus(&hdmi->wp, in hdmi_power_on_full()
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| D | hdmi4.c | 66 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
69 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
70 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
80 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
82 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
85 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
87 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
89 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
149 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_power_on_full() local
158 hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE); in hdmi_power_on_full()
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| D | hdmi_pll.c | 42 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
50 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
60 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
63 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
147 if (hpll->wp->version == 4) in hdmi_init_pll_data()
162 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) in hdmi_pll_init() argument
168 pll->wp = wp; in hdmi_pll_init()
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| D | hdmi4_cec.c | 176 hdmi_wp_clear_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
177 hdmi_wp_set_irqstatus(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
178 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi_cec_adap_enable()
190 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0x18, 5, 0); in hdmi_cec_adap_enable()
213 hdmi_wp_set_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
250 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi_cec_adap_enable()
338 struct hdmi_wp_data *wp) in hdmi4_cec_init() argument
349 core->wp = wp; in hdmi4_cec_init()
352 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi4_cec_init()
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| /Linux-v5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi_wp.c | 21 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
23 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
45 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
47 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
50 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
52 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
54 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
57 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
59 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
62 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
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| D | hdmi.h | 233 struct hdmi_wp_data *wp; member
277 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
278 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
279 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
280 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
281 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
282 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
283 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
284 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
285 int hdmi_wp_set_pll_pwr(struct hdmi_wp_data *wp, enum hdmi_pll_pwr val);
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| D | hdmi5.c | 66 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
69 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
70 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
82 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
94 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
97 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
102 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
104 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
179 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); in hdmi_power_on_full()
180 hdmi_wp_set_irqstatus(&hdmi.wp, in hdmi_power_on_full()
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| D | hdmi4.c | 62 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
65 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
66 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
76 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
78 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
81 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
83 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
85 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
149 struct hdmi_wp_data *wp = &hdmi.wp; in hdmi_power_on_full() local
157 hdmi_wp_clear_irqenable(wp, 0xffffffff); in hdmi_power_on_full()
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| D | hdmi_pll.c | 102 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
107 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
117 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
119 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
220 struct hdmi_wp_data *wp) in hdmi_pll_init() argument
225 pll->wp = wp; in hdmi_pll_init()
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| /Linux-v5.10/arch/powerpc/math-emu/ |
| D | math_efp.c | 108 u32 wp[2]; member
199 vc.wp[0] = current->thread.evr[fc]; in do_spe_mathemu()
200 vc.wp[1] = regs->gpr[fc]; in do_spe_mathemu()
201 va.wp[0] = current->thread.evr[fa]; in do_spe_mathemu()
202 va.wp[1] = regs->gpr[fa]; in do_spe_mathemu()
203 vb.wp[0] = current->thread.evr[fb]; in do_spe_mathemu()
204 vb.wp[1] = regs->gpr[fb]; in do_spe_mathemu()
209 pr_debug("vc: %08x %08x\n", vc.wp[0], vc.wp[1]); in do_spe_mathemu()
210 pr_debug("va: %08x %08x\n", va.wp[0], va.wp[1]); in do_spe_mathemu()
211 pr_debug("vb: %08x %08x\n", vb.wp[0], vb.wp[1]); in do_spe_mathemu()
[all …]
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| /Linux-v5.10/lib/mpi/ |
| D | mpi-add.c | 22 mpi_ptr_t wp, up; in mpi_add_ui() local
37 wp = w->d; in mpi_add_ui()
40 wp[0] = v; in mpi_add_ui()
44 cy = mpihelp_add_1(wp, up, usize, v); in mpi_add_ui()
45 wp[usize] = cy; in mpi_add_ui()
52 wp[0] = v - up[0]; in mpi_add_ui()
55 mpihelp_sub_1(wp, up, usize, v); in mpi_add_ui()
57 wsize = usize - (wp[usize-1] == 0); in mpi_add_ui()
69 mpi_ptr_t wp, up, vp; in mpi_add() local
94 wp = w->d; in mpi_add()
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| D | mpi-mul.c | 19 mpi_ptr_t up, vp, wp; in mpi_mul() local
42 wp = w->d; in mpi_mul()
47 if (wp == up || wp == vp) { in mpi_mul()
48 wp = mpi_alloc_limb_space(wsize); in mpi_mul()
52 wp = w->d; in mpi_mul()
55 if (wp == up) { in mpi_mul()
59 if (wp == vp) in mpi_mul()
62 MPN_COPY(up, wp, usize); in mpi_mul()
63 } else if (wp == vp) { in mpi_mul()
67 MPN_COPY(vp, wp, vsize); in mpi_mul()
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| D | ec.c | 182 static void mpih_set_cond(mpi_ptr_t wp, mpi_ptr_t up, in mpih_set_cond() argument
190 x = mask & (wp[i] ^ up[i]); in mpih_set_cond()
191 wp[i] = wp[i] ^ x; in mpih_set_cond()
201 mpi_ptr_t wp, up, vp; in ec_addm_25519() local
212 wp = w->d; in ec_addm_25519()
214 mpihelp_add_n(wp, up, vp, wsize); in ec_addm_25519()
215 borrow = mpihelp_sub_n(wp, wp, ctx->p->d, wsize); in ec_addm_25519()
217 mpihelp_add_n(wp, wp, n, wsize); in ec_addm_25519()
218 wp[LIMB_SIZE_25519-1] &= ~((mpi_limb_t)1 << (255 % BITS_PER_MPI_LIMB)); in ec_addm_25519()
223 mpi_ptr_t wp, up, vp; in ec_subm_25519() local
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| D | generic_mpih-lshift.c | 28 mpihelp_lshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned int cnt) in mpihelp_lshift() argument
36 wp += 1; in mpihelp_lshift()
44 wp[i] = (high_limb << sh_1) | (low_limb >> sh_2); in mpihelp_lshift()
47 wp[i] = high_limb << sh_1; in mpihelp_lshift()
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| D | generic_mpih-rshift.c | 29 mpihelp_rshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned cnt) in mpihelp_rshift() argument
37 wp -= 1; in mpihelp_rshift()
44 wp[i] = (low_limb >> sh_1) | (high_limb << sh_2); in mpihelp_rshift()
47 wp[i] = low_limb >> sh_1; in mpihelp_rshift()
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| /Linux-v5.10/tools/testing/selftests/breakpoints/ |
| D | breakpoint_test_arm64.c | 81 static bool set_watchpoint(pid_t pid, int size, int wp) in set_watchpoint() argument
83 const volatile uint8_t *addr = &var[32 + wp]; in set_watchpoint()
112 static bool run_test(int wr_size, int wp_size, int wr, int wp) in run_test() argument
143 if (!set_watchpoint(pid, wp_size, wp)) in run_test()
204 int wr, wp, size; in main() local
216 for (wp = wr - size; wp <= wr + size; wp = wp + size) { in main()
217 result = run_test(size, MIN(size, 8), wr, wp); in main()
218 if ((result && wr == wp) || in main()
219 (!result && wr != wp)) in main()
222 size, wr, wp); in main()
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| /Linux-v5.10/sound/hda/ |
| D | hdac_controller.c | 70 bus->rirb.wp = bus->rirb.rp = 0; in snd_hdac_bus_init_cmd_io()
145 unsigned int wp, rp; in snd_hdac_bus_send_cmd() local
152 wp = snd_hdac_chip_readw(bus, CORBWP); in snd_hdac_bus_send_cmd()
153 if (wp == 0xffff) { in snd_hdac_bus_send_cmd()
158 wp++; in snd_hdac_bus_send_cmd()
159 wp %= AZX_MAX_CORB_ENTRIES; in snd_hdac_bus_send_cmd()
162 if (wp == rp) { in snd_hdac_bus_send_cmd()
169 bus->corb.buf[wp] = cpu_to_le32(val); in snd_hdac_bus_send_cmd()
170 snd_hdac_chip_writew(bus, CORBWP, wp); in snd_hdac_bus_send_cmd()
189 unsigned int rp, wp; in snd_hdac_bus_update_rirb() local
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| /Linux-v5.10/arch/ia64/kernel/ |
| D | patch.c | 147 u64 *wp; in ia64_patch_mckinley_e9() local
160 wp = (u64 *) ia64_imva((char *) offp + *offp); in ia64_patch_mckinley_e9()
161 wp[0] = 0x0000000100000011UL; /* nop.m 0; nop.i 0; br.ret.sptk.many b6 */ in ia64_patch_mckinley_e9()
162 wp[1] = 0x0084006880000200UL; in ia64_patch_mckinley_e9()
163 wp[2] = 0x0000000100000000UL; /* nop.m 0; nop.i 0; nop.i 0 */ in ia64_patch_mckinley_e9()
164 wp[3] = 0x0004000000000200UL; in ia64_patch_mckinley_e9()
165 ia64_fc(wp); ia64_fc(wp + 2); in ia64_patch_mckinley_e9()
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| /Linux-v5.10/lib/raid6/ |
| D | neon.uc | 62 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
70 wq$$ = wp$$ = vld1q_u8(&dptr[z0][d+$$*NSIZE]);
73 wp$$ = veorq_u8(wp$$, wd$$);
81 vst1q_u8(&p[d+NSIZE*$$], wp$$);
93 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
102 wp$$ = veorq_u8(vld1q_u8(&p[d+$$*NSIZE]), wq$$);
107 wp$$ = veorq_u8(wp$$, wd$$);
149 vst1q_u8(&p[d+NSIZE*$$], wp$$);
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| D | int.uc | 88 unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
95 wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
98 wp$$ ^= wd$$;
105 *(unative_t *)&p[d+NSIZE*$$] = wp$$;
117 unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
125 wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
128 wp$$ ^= wd$$;
142 *(unative_t *)&p[d+NSIZE*$$] ^= wp$$;
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| /Linux-v5.10/arch/arm/kernel/ |
| D | hw_breakpoint.c | 732 struct perf_event *wp, **slots; in watchpoint_handler() local
744 wp = slots[i]; in watchpoint_handler()
745 if (wp == NULL) in watchpoint_handler()
756 info = counter_arch_bp(wp); in watchpoint_handler()
757 info->trigger = wp->attr.bp_addr; in watchpoint_handler()
763 if (!(access & hw_breakpoint_type(wp))) in watchpoint_handler()
780 info = counter_arch_bp(wp); in watchpoint_handler()
794 perf_bp_event(wp, regs); in watchpoint_handler()
801 if (!is_default_overflow_handler(wp)) in watchpoint_handler()
804 enable_single_step(wp, instruction_pointer(regs)); in watchpoint_handler()
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| /Linux-v5.10/drivers/block/ |
| D | null_blk_zoned.c | 93 zone->wp = zone->start + zone->len; in null_init_zoned_dev()
103 zone->start = zone->wp = sector; in null_init_zoned_dev()
211 sector + nr_sectors <= zone->wp) in null_zone_valid_read_len()
214 if (sector > zone->wp) in null_zone_valid_read_len()
217 return (zone->wp - sector) << SECTOR_SHIFT; in null_zone_valid_read_len()
241 if (zone->wp == zone->start) { in null_close_zone()
367 sector = zone->wp; in null_zone_write()
372 } else if (sector != zone->wp) { in null_zone_write()
377 if (zone->wp + nr_sectors > zone->start + zone->capacity) { in null_zone_write()
405 zone->wp += nr_sectors; in null_zone_write()
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| /Linux-v5.10/drivers/net/wireless/realtek/rtw88/ |
| D | pci.h | 144 static inline int avail_desc(u32 wp, u32 rp, u32 len) in avail_desc() argument
146 if (rp > wp) in avail_desc()
147 return rp - wp - 1; in avail_desc()
149 return len - wp + rp - 1; in avail_desc()
173 u32 wp; member
251 buf_desc = ring->r.head + ring->r.wp * size; in get_tx_buffer_desc()
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