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Searched refs:uint16_t (Results 1 – 25 of 944) sorted by relevance

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/Linux-v5.10/drivers/gpu/drm/amd/pm/inc/
Dsmu7_ppsmc.h30 #define PPSMC_MSG_SetGBDroopSettings ((uint16_t) 0x305)
83 #define PPSMC_Result_OK ((uint16_t)0x01)
84 #define PPSMC_Result_NoMore ((uint16_t)0x02)
86 #define PPSMC_Result_NotNow ((uint16_t)0x03)
87 #define PPSMC_Result_Failed ((uint16_t)0xFF)
88 #define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
89 #define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
91 typedef uint16_t PPSMC_Result;
93 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
96 #define PPSMC_MSG_Halt ((uint16_t)0x10)
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Dtonga_ppsmc.h89 #define PPSMC_Result_OK ((uint16_t)0x01)
90 #define PPSMC_Result_NoMore ((uint16_t)0x02)
91 #define PPSMC_Result_NotNow ((uint16_t)0x03)
93 #define PPSMC_Result_Failed ((uint16_t)0xFF)
94 #define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
95 #define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
97 typedef uint16_t PPSMC_Result;
99 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
102 #define PPSMC_MSG_Halt ((uint16_t)0x10)
103 #define PPSMC_MSG_Resume ((uint16_t)0x11)
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Dfiji_ppsmc.h87 #define PPSMC_Result_OK ((uint16_t)0x01)
88 #define PPSMC_Result_NoMore ((uint16_t)0x02)
90 #define PPSMC_Result_NotNow ((uint16_t)0x03)
92 #define PPSMC_Result_Failed ((uint16_t)0xFF)
93 #define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
94 #define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
96 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
99 #define PPSMC_MSG_Halt ((uint16_t)0x10)
100 #define PPSMC_MSG_Resume ((uint16_t)0x11)
101 #define PPSMC_MSG_EnableDPMLevel ((uint16_t)0x12)
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Dcz_ppsmc.h49 #define PPSMC_Result_OK ((uint16_t)0x01)
50 #define PPSMC_Result_NoMore ((uint16_t)0x02)
51 #define PPSMC_Result_NotNow ((uint16_t)0x03)
52 #define PPSMC_Result_Failed ((uint16_t)0xFF)
53 #define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
54 #define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
56 #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
61 #define PPSMC_MSG_Test ((uint16_t) 0x1)
62 #define PPSMC_MSG_GetFeatureStatus ((uint16_t) 0x2)
63 #define PPSMC_MSG_EnableAllSmuFeatures ((uint16_t) 0x3)
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Dsmu11_driver_if_navi10.h314 uint16_t SlaveAddress;
489 uint16_t DeviceID;
491 uint16_t DieTemperatureLimit;
492 uint16_t FanTargetTemperature;
494 uint16_t MemoryTemperatureLimit;
495 uint16_t MemoryTemperatureLimit1;
497 uint16_t TGP;
498 uint16_t CardPower;
508 uint16_t DieTemperature;
509 uint16_t CurrentMemoryTemperature;
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Dsmu11_driver_if.h368 uint16_t SocketPowerLimitAc0;
369 uint16_t SocketPowerLimitAc0Tau;
370 uint16_t SocketPowerLimitAc1;
371 uint16_t SocketPowerLimitAc1Tau;
372 uint16_t SocketPowerLimitAc2;
373 uint16_t SocketPowerLimitAc2Tau;
374 uint16_t SocketPowerLimitAc3;
375 uint16_t SocketPowerLimitAc3Tau;
376 uint16_t SocketPowerLimitDc;
377 uint16_t SocketPowerLimitDcTau;
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Dsmu11_driver_if_sienna_cichlid.h535 …uint16_t SsFmin; // Fmin for SS curve. If SS curve is selected, will use V@SSFm…
536 uint16_t Padding16;
575 uint16_t Fmin;
576 uint16_t Fmax;
588 uint16_t SocketPowerLimitAc[PPT_THROTTLER_COUNT]; // Watts
589 uint16_t SocketPowerLimitAcTau[PPT_THROTTLER_COUNT]; // Time constant of LPF in ms
590 uint16_t SocketPowerLimitDc[PPT_THROTTLER_COUNT]; // Watts
591 uint16_t SocketPowerLimitDcTau[PPT_THROTTLER_COUNT]; // Time constant of LPF in ms
593 uint16_t TdcLimit[TDC_THROTTLER_COUNT]; // Amps
594 uint16_t TdcLimitTau[TDC_THROTTLER_COUNT]; // Time constant of LPF in ms
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Dsmu11_driver_if_arcturus.h310 uint16_t SlaveAddress;
463 …uint16_t SsFmin; // Fmin for SS curve. If SS curve is selected, will use V@SSFm…
464 uint16_t Padding16;
474 uint16_t SocketPowerLimitAc[PPT_THROTTLER_COUNT];
475 uint16_t SocketPowerLimitAcTau[PPT_THROTTLER_COUNT];
476 uint16_t TdcLimitSoc; // Amps
477 uint16_t TdcLimitSocTau; // Time constant of LPF in ms
478 uint16_t TdcLimitGfx; // Amps
479 uint16_t TdcLimitGfxTau; // Time constant of LPF in ms
481 uint16_t TedgeLimit; // Celcius
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Dsmu12_driver_if.h46 uint16_t Freq; // in MHz
47 uint16_t Vid; // min voltage in SVI2 VID
51 uint16_t MinClock; // This is either DCFCLK or SOCCLK (in MHz)
52 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz)
53 uint16_t MinMclk;
54 uint16_t MaxMclk;
172 uint16_t ClockFrequency[CLOCK_COUNT]; //[MHz]
174 uint16_t AverageGfxclkFrequency; //[MHz]
175 uint16_t AverageSocclkFrequency; //[MHz]
176 uint16_t AverageVclkFrequency; //[MHz]
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Dhwmgr.h211 int (*send_msg_to_smc)(struct pp_hwmgr *hwmgr, uint16_t msg);
213 uint16_t msg, uint32_t parameter);
231 …int (*smc_table_manager)(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw); /*rw…
275 int (*set_max_fan_rpm_output)(struct pp_hwmgr *hwmgr, uint16_t us_max_fan_pwm);
276 int (*set_max_fan_pwm_output)(struct pp_hwmgr *hwmgr, uint16_t us_max_fan_pwm);
385 uint16_t Vddc; /* in CI, we use it for StdVoltageHiSidd */
389 uint16_t Vddc1;
390 uint16_t Vddc2;
391 uint16_t Vddc3;
412 uint16_t usTDP;
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Dsmu9_driver_if.h83 uint16_t SsSlewFrac;
121 uint16_t Freq; /* in MHz */
122 uint16_t Vid; /* min voltage in SVI2 VID */
127 uint16_t SocketPowerLimit; /* Watts */
128 uint16_t TdcLimit; /* Amps */
129 uint16_t EdcLimit; /* Amps */
130 uint16_t TedgeLimit; /* Celcius */
131 uint16_t ThotspotLimit; /* Celcius */
132 uint16_t ThbmLimit; /* Celcius */
133 uint16_t Tvr_socLimit; /* Celcius */
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Dsmu74_discrete.h46 uint16_t fcw_pcc;
48 uint16_t fcw_trans_upper;
49 uint16_t fcw_trans_lower;
54 uint16_t Voltage;
69 uint16_t Fcw_int;
70 uint16_t Fcw_frac;
71 uint16_t Pcc_fcw_int;
74 uint16_t Sclk_slew_rate;
75 uint16_t Pcc_up_slew_rate;
76 uint16_t Pcc_down_slew_rate;
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Dsmu75_discrete.h45 uint16_t fcw_pcc;
46 uint16_t fcw_trans_upper;
47 uint16_t fcw_trans_lower;
52 uint16_t Voltage;
67 uint16_t Fcw_int;
68 uint16_t Fcw_frac;
69 uint16_t Pcc_fcw_int;
72 uint16_t Sclk_slew_rate;
73 uint16_t Pcc_up_slew_rate;
74 uint16_t Pcc_down_slew_rate;
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/Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/
Dppsmc.h113 #define PPSMC_MSG_EnableACDCGPIOInterrupt ((uint16_t) 0x149)
116 #define PPSMC_MSG_UVDDPM_SetEnabledMask ((uint16_t) 0x12D)
117 #define PPSMC_MSG_VCEDPM_SetEnabledMask ((uint16_t) 0x12E)
118 #define PPSMC_MSG_ACPDPM_SetEnabledMask ((uint16_t) 0x12F)
119 #define PPSMC_MSG_SAMUDPM_SetEnabledMask ((uint16_t) 0x130)
120 #define PPSMC_MSG_MCLKDPM_ForceState ((uint16_t) 0x131)
121 #define PPSMC_MSG_MCLKDPM_NoForcedLevel ((uint16_t) 0x132)
122 #define PPSMC_MSG_Thermal_Cntl_Disable ((uint16_t) 0x133)
123 #define PPSMC_MSG_Voltage_Cntl_Disable ((uint16_t) 0x135)
124 #define PPSMC_MSG_PCIeDPM_Enable ((uint16_t) 0x136)
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/Linux-v5.10/drivers/gpu/drm/amd/pm/inc/vega12/
Dsmu9_driver_if.h255 uint16_t SocketPowerLimitAc0;
256 uint16_t SocketPowerLimitAc0Tau;
257 uint16_t SocketPowerLimitAc1;
258 uint16_t SocketPowerLimitAc1Tau;
259 uint16_t SocketPowerLimitAc2;
260 uint16_t SocketPowerLimitAc2Tau;
261 uint16_t SocketPowerLimitAc3;
262 uint16_t SocketPowerLimitAc3Tau;
263 uint16_t SocketPowerLimitDc;
264 uint16_t SocketPowerLimitDcTau;
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/Linux-v5.10/drivers/gpu/drm/radeon/
Dppsmc.h113 #define PPSMC_MSG_UVDDPM_SetEnabledMask ((uint16_t) 0x12D)
114 #define PPSMC_MSG_VCEDPM_SetEnabledMask ((uint16_t) 0x12E)
115 #define PPSMC_MSG_ACPDPM_SetEnabledMask ((uint16_t) 0x12F)
116 #define PPSMC_MSG_SAMUDPM_SetEnabledMask ((uint16_t) 0x130)
117 #define PPSMC_MSG_MCLKDPM_ForceState ((uint16_t) 0x131)
118 #define PPSMC_MSG_MCLKDPM_NoForcedLevel ((uint16_t) 0x132)
119 #define PPSMC_MSG_Thermal_Cntl_Disable ((uint16_t) 0x133)
120 #define PPSMC_MSG_Voltage_Cntl_Disable ((uint16_t) 0x135)
121 #define PPSMC_MSG_PCIeDPM_Enable ((uint16_t) 0x136)
122 #define PPSMC_MSG_PCIeDPM_Disable ((uint16_t) 0x13d)
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/Linux-v5.10/drivers/gpu/drm/amd/include/
Datomfirmware.h48 #ifndef uint16_t
49 typedef unsigned short uint16_t; typedef
227 uint16_t structuresize;
239 uint16_t bios_segment_address;
240 uint16_t protectedmodeoffset;
241 uint16_t configfilenameoffset;
242 uint16_t crc_block_offset;
243 uint16_t vbios_bootupmessageoffset;
244 uint16_t int10_offset;
245 uint16_t pcibusdevinitcode;
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Dkgd_pp_interface.h330 uint16_t structure_size;
342 uint16_t temperature_edge;
343 uint16_t temperature_hotspot;
344 uint16_t temperature_mem;
345 uint16_t temperature_vrgfx;
346 uint16_t temperature_vrsoc;
347 uint16_t temperature_vrmem;
350 uint16_t average_gfx_activity;
351 uint16_t average_umc_activity; // memory controller
352 uint16_t average_mm_activity; // UVD or VCN
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/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_scl_filters.c36 static const uint16_t filter_2tap_16p[18] = {
57 static const uint16_t filter_3tap_16p_upscale[27] = {
78 static const uint16_t filter_3tap_16p_116[27] = {
99 static const uint16_t filter_3tap_16p_149[27] = {
120 static const uint16_t filter_3tap_16p_183[27] = {
141 static const uint16_t filter_4tap_16p_upscale[36] = {
162 static const uint16_t filter_4tap_16p_116[36] = {
183 static const uint16_t filter_4tap_16p_149[36] = {
204 static const uint16_t filter_4tap_16p_183[36] = {
225 static const uint16_t filter_2tap_64p[66] = {
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/Linux-v5.10/drivers/scsi/qla4xxx/
Dql4_fw.h296 uint16_t version;
297 uint16_t len;
298 uint16_t checksum;
301 uint16_t man_id;
302 uint16_t id;
319 uint16_t read_timeout;
328 uint16_t start_lo;
329 uint16_t start_hi;
332 uint16_t checksum;
336 uint16_t version;
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/Linux-v5.10/drivers/scsi/qla2xxx/
Dqla_gbl.h42 extern int qla2x00_fabric_login(scsi_qla_host_t *, fc_port_t *, uint16_t *);
61 extern int qla2x00_get_thermal_temp(scsi_qla_host_t *, uint16_t *);
66 uint16_t *);
70 uint16_t *);
73 uint16_t *);
120 uint16_t *);
122 uint16_t *);
124 fc_port_t *, uint16_t *);
185 extern int qla2x00_post_idc_ack_work(struct scsi_qla_host *, uint16_t *);
187 uint16_t *);
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/Linux-v5.10/include/linux/
Dpe.h163 uint16_t magic; /* MZ_MAGIC */
164 uint16_t lbsize; /* size of last used block */
165 uint16_t blocks; /* pages in file, 0x3 */
166 uint16_t relocs; /* relocations */
167 uint16_t hdrsize; /* header size in "paragraphs" */
168 uint16_t min_extra_pps; /* .bss */
169 uint16_t max_extra_pps; /* runtime limit for the arena size */
170 uint16_t ss; /* relative stack segment */
171 uint16_t sp; /* initial %sp register */
172 uint16_t checksum; /* word checksum */
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Drslib.h37 uint16_t *alpha_to;
38 uint16_t *index_of;
39 uint16_t *genpoly;
57 uint16_t buffers[];
62 int encode_rs8(struct rs_control *rs, uint8_t *data, int len, uint16_t *par,
63 uint16_t invmsk);
66 int decode_rs8(struct rs_control *rs, uint8_t *data, uint16_t *par, int len,
67 uint16_t *s, int no_eras, int *eras_pos, uint16_t invmsk,
68 uint16_t *corr);
73 int encode_rs16(struct rs_control *rs, uint16_t *data, int len, uint16_t *par,
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/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dwb_scl.c50 static const uint16_t filter_3tap_16p_upscale[27] = {
62 static const uint16_t filter_3tap_16p_117[27] = {
74 static const uint16_t filter_3tap_16p_150[27] = {
86 static const uint16_t filter_3tap_16p_183[27] = {
98 static const uint16_t filter_4tap_16p_upscale[36] = {
110 static const uint16_t filter_4tap_16p_117[36] = {
122 static const uint16_t filter_4tap_16p_150[36] = {
134 static const uint16_t filter_4tap_16p_183[36] = {
146 static const uint16_t filter_5tap_16p_upscale[45] = {
158 static const uint16_t filter_5tap_16p_117[45] = {
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/Linux-v5.10/drivers/scsi/
Dqla1280.h116 uint16_t id_l; /* ID low */
117 uint16_t id_h; /* ID high */
118 uint16_t cfg_0; /* Configuration 0 */
126 uint16_t cfg_1; /* Configuration 1 */
133 uint16_t ictrl; /* Interface control */
139 uint16_t istatus; /* Interface status */
143 uint16_t semaphore; /* Semaphore */
144 uint16_t nvram; /* NVRAM register. */
150 uint16_t flash_data; /* Flash BIOS data */
151 uint16_t flash_address; /* Flash BIOS address */
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