Searched refs:training_lane (Results 1 – 3 of 3) sorted by relevance
152 u8 training_lane[4]; member225 u32 training_lane);227 u32 training_lane);229 u32 training_lane);231 u32 training_lane);
446 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_get_adjust_training_lane() local454 training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) | in analogix_dp_get_adjust_training_lane()458 training_lane |= DP_TRAIN_MAX_SWING_REACHED; in analogix_dp_get_adjust_training_lane()460 training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; in analogix_dp_get_adjust_training_lane()462 dp->link_train.training_lane[lane] = training_lane; in analogix_dp_get_adjust_training_lane()469 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_process_clock_recovery() local499 training_lane = analogix_dp_get_lane_link_training( in analogix_dp_process_clock_recovery()506 if (DPCD_VOLTAGE_SWING_GET(training_lane) == in analogix_dp_process_clock_recovery()508 DPCD_PRE_EMPHASIS_GET(training_lane) == in analogix_dp_process_clock_recovery()528 dp->link_train.training_lane[lane], lane); in analogix_dp_process_clock_recovery()[all …]
742 u32 training_lane) in analogix_dp_set_lane0_link_training() argument746 reg = training_lane; in analogix_dp_set_lane0_link_training()751 u32 training_lane) in analogix_dp_set_lane1_link_training() argument755 reg = training_lane; in analogix_dp_set_lane1_link_training()760 u32 training_lane) in analogix_dp_set_lane2_link_training() argument764 reg = training_lane; in analogix_dp_set_lane2_link_training()769 u32 training_lane) in analogix_dp_set_lane3_link_training() argument773 reg = training_lane; in analogix_dp_set_lane3_link_training()
