Searched refs:tim2 (Results 1 – 5 of 5) sorted by relevance
134 u32 cpl, tim2; in pl111_display_enable() local171 tim2 = readl(priv->regs + CLCD_TIM2); in pl111_display_enable()172 tim2 &= (TIM2_BCD | TIM2_PCD_LO_MASK | TIM2_PCD_HI_MASK); in pl111_display_enable()175 tim2 |= TIM2_BCD; in pl111_display_enable()178 tim2 |= TIM2_IHS; in pl111_display_enable()181 tim2 |= TIM2_IVS; in pl111_display_enable()185 tim2 |= TIM2_IOE; in pl111_display_enable()189 tim2 |= TIM2_IPC; in pl111_display_enable()203 tim2 |= TIM2_ACB_MASK; in pl111_display_enable()226 tim2 ^= TIM2_IPC; in pl111_display_enable()[all …]
47 u32 tim2; member67 u32 tim2; member166 val = fb->panel->tim2; in clcdfb_decode()180 regs->tim2 = val | ((cpl - 1) << 16); in clcdfb_decode()
311 writel(regs.tim2, fb->regs + CLCD_TIM2); in clcdfb_set_par()577 clcd_panel->tim2 |= TIM2_IPC; in clcdfb_of_get_dpi_panel_mode()585 clcd_panel->tim2 |= TIM2_IPC; in clcdfb_of_get_dpi_panel_mode()588 clcd_panel->tim2 |= TIM2_IHS; in clcdfb_of_get_dpi_panel_mode()591 clcd_panel->tim2 |= TIM2_IVS; in clcdfb_of_get_dpi_panel_mode()594 clcd_panel->tim2 |= TIM2_IOE; in clcdfb_of_get_dpi_panel_mode()667 fb->panel->tim2 |= TIM2_BCD; in clcdfb_of_init_tft_panel()
467 u32 tim2 = 0, val = 0; in get_sdram_tim_2_shdw() local470 tim2 |= val << T_CKE_SHIFT; in get_sdram_tim_2_shdw()473 tim2 |= val << T_RTP_SHIFT; in get_sdram_tim_2_shdw()477 tim2 |= val << T_XSNR_SHIFT; in get_sdram_tim_2_shdw()480 tim2 |= val << T_XSRD_SHIFT; in get_sdram_tim_2_shdw()483 tim2 |= val << T_XP_SHIFT; in get_sdram_tim_2_shdw()485 return tim2; in get_sdram_tim_2_shdw()
531 unsigned int *tim1, unsigned int *tim2, in pci9118_calc_divisors() argument539 *div1 = *tim2 / pacer->osc_base; /* convert timer (burst) */ in pci9118_calc_divisors()545 *tim2 = *div1 * pacer->osc_base; /* real convert timer */ in pci9118_calc_divisors()
