Searched refs:tile_width (Results 1 – 6 of 6) sorted by relevance
| /Linux-v5.10/drivers/gpu/drm/i915/gem/ |
| D | i915_gem_tiling.c | 121 unsigned int tile_width; in i915_tiling_ok() local
149 tile_width = 128; in i915_tiling_ok()
151 tile_width = 512; in i915_tiling_ok()
153 if (!stride || !IS_ALIGNED(stride, tile_width)) in i915_tiling_ok()
|
| /Linux-v5.10/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_mdss.h | 368 u16 tile_width; member
|
| /Linux-v5.10/drivers/staging/media/allegro-dvt/ |
| D | allegro-mail.h | 255 s32 tile_width[4]; member
|
| D | allegro-mail.c | 432 msg->tile_width[j] = src[i++]; in allegro_dec_encode_frame()
|
| /Linux-v5.10/drivers/gpu/drm/i915/display/ |
| D | intel_display.c | 2082 unsigned int *tile_width, in intel_tile_dims() argument
2088 *tile_width = tile_width_bytes / cpp; in intel_tile_dims()
2095 unsigned int tile_width, tile_height; in intel_tile_row_size() local
2097 intel_tile_dims(fb, color_plane, &tile_width, &tile_height); in intel_tile_row_size()
2365 unsigned int tile_width, in intel_adjust_tile_offset() argument
2372 unsigned int pitch_pixels = pitch_tiles * tile_width; in intel_adjust_tile_offset()
2382 *x += tiles % pitch_tiles * tile_width; in intel_adjust_tile_offset()
2410 unsigned int tile_size, tile_width, tile_height; in intel_adjust_aligned_offset() local
2414 intel_tile_dims(fb, color_plane, &tile_width, &tile_height); in intel_adjust_aligned_offset()
2418 swap(tile_width, tile_height); in intel_adjust_aligned_offset()
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/radeon/ |
| D | r600_cs.c | 255 u32 tile_width = 8; in r600_get_array_mode_alignment() local
259 u32 tile_bytes = tile_width * tile_height * values->blocksize * values->nsamples; in r600_get_array_mode_alignment()
277 *pitch_align = max((u32)tile_width, in r600_get_array_mode_alignment()
285 *pitch_align = max((u32)macro_tile_width * tile_width, in r600_get_array_mode_alignment()
287 (values->blocksize * values->nsamples * tile_width))); in r600_get_array_mode_alignment()
|
