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Searched refs:set_rate_and_parent (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.10/drivers/clk/ti/
Ddpll.c39 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
64 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
77 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
118 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
130 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
142 .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent,
/Linux-v5.10/drivers/clk/qcom/
Dclk-rcg2.c367 .set_rate_and_parent = clk_rcg2_set_rate_and_parent,
378 .set_rate_and_parent = clk_rcg2_set_floor_rate_and_parent,
504 .set_rate_and_parent = clk_edp_pixel_set_rate_and_parent,
562 .set_rate_and_parent = clk_byte_set_rate_and_parent,
632 .set_rate_and_parent = clk_byte2_set_rate_and_parent,
722 .set_rate_and_parent = clk_pixel_set_rate_and_parent,
809 .set_rate_and_parent = clk_gfx3d_set_rate_and_parent,
948 .set_rate_and_parent = clk_rcg2_shared_set_rate_and_parent,
1210 .set_rate_and_parent = clk_rcg2_dp_set_rate_and_parent,
Dclk-rcg.c838 .set_rate_and_parent = clk_rcg_bypass2_set_rate_and_parent,
850 .set_rate_and_parent = clk_rcg_pixel_set_rate_and_parent,
862 .set_rate_and_parent = clk_rcg_esc_set_rate_and_parent,
886 .set_rate_and_parent = clk_dyn_rcg_set_rate_and_parent,
Dclk-regmap-mux-div.c227 .set_rate_and_parent = mux_div_set_rate_and_parent,
/Linux-v5.10/drivers/clk/tegra/
Dclk-tegra20-emc.c219 .set_rate_and_parent = emc_set_rate_and_parent,
/Linux-v5.10/drivers/clk/
Dclk-composite.c276 clk_composite_ops->set_rate_and_parent = in __clk_hw_register_composite()
Dclk.c2072 if (core->ops->set_rate_and_parent) { in clk_change_rate()
2074 core->ops->set_rate_and_parent(core->hw, core->new_rate, in clk_change_rate()
3428 if (core->ops->set_rate_and_parent && in __clk_core_init()
/Linux-v5.10/drivers/clk/mmp/
Dclk-mix.c434 .set_rate_and_parent = mmp_clk_mix_set_rate_and_parent,
/Linux-v5.10/Documentation/driver-api/
Dclk.rst90 int (*set_rate_and_parent)(struct clk_hw *hw,
/Linux-v5.10/drivers/clk/microchip/
Dclk-core.c553 .set_rate_and_parent = roclk_set_rate_and_parent,
/Linux-v5.10/include/linux/
Dclk-provider.h241 int (*set_rate_and_parent)(struct clk_hw *hw, member