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Searched refs:sdhci_readw (Results 1 – 25 of 26) sorted by relevance

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/Linux-v5.10/drivers/mmc/host/
Dsdhci.c61 sdhci_readw(host, SDHCI_HOST_VERSION)); in sdhci_dumpregs()
63 sdhci_readw(host, SDHCI_BLOCK_SIZE), in sdhci_dumpregs()
64 sdhci_readw(host, SDHCI_BLOCK_COUNT)); in sdhci_dumpregs()
67 sdhci_readw(host, SDHCI_TRANSFER_MODE)); in sdhci_dumpregs()
76 sdhci_readw(host, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs()
84 sdhci_readw(host, SDHCI_AUTO_CMD_STATUS), in sdhci_dumpregs()
85 sdhci_readw(host, SDHCI_SLOT_INT_STATUS)); in sdhci_dumpregs()
90 sdhci_readw(host, SDHCI_COMMAND), in sdhci_dumpregs()
99 sdhci_readw(host, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs()
131 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
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Dsdhci-milbeaut.c92 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
105 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
189 ctl = sdhci_readw(host, F_SDH30_AHB_CONFIG); in sdhci_milbeaut_vendor_init()
218 ctl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
Dsdhci-sprd.c163 u16 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
173 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
313 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
506 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
638 host->version = sdhci_readw(host, SDHCI_HOST_VERSION); in sdhci_sprd_probe()
Dsdhci_f_sdh30.c67 if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) in sdhci_f_sdh30_reset()
156 ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG); in sdhci_f_sdh30_probe()
Dsdhci-xenon.c37 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
195 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
247 sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_voltage_switch()
291 reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_ios()
Dsdhci-cns3xxx.c62 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_cns3xxx_set_clock()
Dsdhci-pci-dwc-mshc.c36 vendor_ptr = sdhci_readw(host, SDHCI_VENDOR_PTR_R); in sdhci_snps_set_clock()
Dsdhci-pci-o2micro.c119 scratch = sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
146 if (!(sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1) & O2_PLL_LOCK_STATUS)) in sdhci_o2_get_cd()
190 reg = sdhci_readw(host, O2_SD_VENDOR_SETTING); in sdhci_o2_set_tuning_mode()
202 u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_o2_execute_tuning()
Dsdhci-pci-arasan.c101 val = sdhci_readw(host, PHY_ADDR_REG); in arasan_phy_addr_poll()
125 *data = sdhci_readw(host, PHY_DAT_REG) & DATA_MASK; in arasan_phy_read()
Dsdhci-pci-gli.c214 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
234 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
280 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_execute_tuning_9750()
635 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
Dsdhci-of-at91.c76 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
90 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_at91_set_clock()
Dsdhci-sirf.c84 clock_setting = sdhci_readw(host, SDHCI_CLK_DELAY_SETTING); in sdhci_sirf_execute_tuning()
Dsdhci-of-dwcmshc.c57 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
Dsdhci.h691 static inline u16 sdhci_readw(struct sdhci_host *host, int reg) in sdhci_readw() function
729 static inline u16 sdhci_readw(struct sdhci_host *host, int reg) in sdhci_readw() function
Dsdhci-s3c.c386 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
402 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_cmu_set_clock()
Dsdhci-brcmstb.c75 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
Dsdhci-of-esdhc.c1214 command = SDHCI_GET_CMD(sdhci_readw(host, in esdhc_irq()
1217 sdhci_readw(host, SDHCI_BLOCK_COUNT) && in esdhc_irq()
1345 host_ver = sdhci_readw(host, SDHCI_HOST_VERSION); in esdhc_init()
Dsdhci-acpi.c594 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
598 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
Dsdhci-st.c261 u16 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
Dsdhci-msm.c1306 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
1766 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
2060 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
2089 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
Dsdhci-pxav3.c250 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
Dsdhci-of-arasan.c854 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
861 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
Dsdhci-xenon-phy.c360 if (sdhci_readw(host, XENON_SLOT_EXT_PRESENT_STATE) & in xenon_emmc_phy_enable_dll()
Dsdhci-pci-core.c1657 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1661 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
Dsdhci-tegra.c240 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()

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