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Searched refs:rtl8xxxu_write32 (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/drivers/net/wireless/realtek/rtl8xxxu/
Drtl8xxxu_8192e.c496 rtl8xxxu_write32(priv, REG_TX_AGC_A_CCK1_MCS32, val32); in rtl8192e_set_tx_power()
501 rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11, val32); in rtl8192e_set_tx_power()
507 rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE18_06, ofdm); in rtl8192e_set_tx_power()
508 rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE54_24, ofdm); in rtl8192e_set_tx_power()
517 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS03_MCS00, mcs); in rtl8192e_set_tx_power()
518 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS07_MCS04, mcs); in rtl8192e_set_tx_power()
519 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS11_MCS08, mcs); in rtl8192e_set_tx_power()
520 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS15_MCS12, mcs); in rtl8192e_set_tx_power()
528 rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK1_55_MCS32, val32); in rtl8192e_set_tx_power()
533 rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11, val32); in rtl8192e_set_tx_power()
[all …]
Drtl8xxxu_8723b.c371 rtl8xxxu_write32(priv, REG_TX_AGC_A_CCK1_MCS32, val32); in rtl8723b_set_tx_power()
376 rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11, val32); in rtl8723b_set_tx_power()
382 rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE18_06, ofdm); in rtl8723b_set_tx_power()
383 rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE54_24, ofdm); in rtl8723b_set_tx_power()
392 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS03_MCS00, mcs); in rtl8723b_set_tx_power()
393 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS07_MCS04, mcs); in rtl8723b_set_tx_power()
491 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00); in rtl8723bu_init_phy_bb()
527 rtl8xxxu_write32(priv, REG_PAD_CTRL1, val32); in rtl8723bu_phy_init_antenna_selection()
531 rtl8xxxu_write32(priv, REG_GPIO_MUXCFG, val32); in rtl8723bu_phy_init_antenna_selection()
535 rtl8xxxu_write32(priv, REG_GPIO_MUXCFG, val32); in rtl8723bu_phy_init_antenna_selection()
[all …]
Drtl8xxxu_core.c748 int rtl8xxxu_write32(struct rtl8xxxu_priv *priv, u16 addr, u32 val) in rtl8xxxu_write32() function
822 rtl8xxxu_write32(priv, REG_FPGA0_XA_HSSI_PARM2, hssia); in rtl8xxxu_read_rfreg()
826 rtl8xxxu_write32(priv, rtl8xxxu_rfregs[path].hssiparm2, val32); in rtl8xxxu_read_rfreg()
830 rtl8xxxu_write32(priv, REG_FPGA0_XA_HSSI_PARM2, hssia); in rtl8xxxu_read_rfreg()
868 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8xxxu_write_rfreg()
872 ret = rtl8xxxu_write32(priv, rtl8xxxu_rfregs[path].lssiparm, dataaddr); in rtl8xxxu_write_rfreg()
883 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8xxxu_write_rfreg()
928 rtl8xxxu_write32(priv, mbox_reg, le32_to_cpu(h2c->raw.data)); in rtl8xxxu_gen1_h2c_cmd()
973 rtl8xxxu_write32(priv, mbox_ext_reg, in rtl8xxxu_gen2_h2c_cmd()
979 rtl8xxxu_write32(priv, mbox_reg, le32_to_cpu(h2c->raw.data)); in rtl8xxxu_gen2_h2c_cmd()
[all …]
Drtl8xxxu_8723a.c214 rtl8xxxu_write32(priv, REG_AFE_XTAL_CTRL, 0x0381808d); in rtl8723au_init_phy_rf()
215 rtl8xxxu_write32(priv, REG_AFE_PLL_CTRL, 0xf0ffff83); in rtl8723au_init_phy_rf()
216 rtl8xxxu_write32(priv, REG_AFE_PLL_CTRL, 0xf0ffff82); in rtl8723au_init_phy_rf()
217 rtl8xxxu_write32(priv, REG_AFE_PLL_CTRL, 0xf0ffff83); in rtl8723au_init_phy_rf()
284 rtl8xxxu_write32(priv, REG_APS_FSMCO, val32); in rtl8723a_emu_to_active()
355 rtl8xxxu_write32(priv, REG_EFUSE_CTRL, val32); in rtl8723au_power_on()
Drtl8xxxu_8192c.c538 rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_PARM, val32); in rtl8192cu_power_on()
Drtl8xxxu.h1471 int rtl8xxxu_write32(struct rtl8xxxu_priv *priv, u16 addr, u32 val);