Searched refs:region_base (Results 1 – 2 of 2) sorted by relevance
925 unsigned long base_ptr, region_base, region_size; in octeon_prune_device_tree() local952 region_base = mio_boot_reg_cfg.s.base << 16; in octeon_prune_device_tree()954 if (mio_boot_reg_cfg.s.en && base_ptr >= region_base in octeon_prune_device_tree()955 && base_ptr < region_base + region_size) { in octeon_prune_device_tree()1007 ranges[(cs * 5) + 2] = cpu_to_be32(region_base >> 32); in octeon_prune_device_tree()1008 ranges[(cs * 5) + 3] = cpu_to_be32(region_base & 0xffffffff); in octeon_prune_device_tree()1029 unsigned long base_ptr, region_base, region_size; in octeon_prune_device_tree() local1042 region_base = mio_boot_reg_cfg.s.base << 16; in octeon_prune_device_tree()1044 if (mio_boot_reg_cfg.s.en && base_ptr >= region_base in octeon_prune_device_tree()1045 && base_ptr < region_base + region_size) in octeon_prune_device_tree()[all …]
208 u64 bar_phys_base, region_base, region_end_address; in hl_pci_set_inbound_region() local217 region_base = bar_phys_base + pci_region->offset_in_bar; in hl_pci_set_inbound_region()218 region_end_address = region_base + pci_region->size - 1; in hl_pci_set_inbound_region()221 lower_32_bits(region_base)); in hl_pci_set_inbound_region()223 upper_32_bits(region_base)); in hl_pci_set_inbound_region()
