Searched refs:reg_val_offs (Results 1 – 6 of 6) sorted by relevance
| /Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_gfx.c | 692 uint32_t seq, reg_val_offs = 0, value = 0; in amdgpu_kiq_rreg() local
702 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in amdgpu_kiq_rreg()
707 amdgpu_ring_emit_rreg(ring, reg, reg_val_offs); in amdgpu_kiq_rreg()
738 value = adev->wb.wb[reg_val_offs]; in amdgpu_kiq_rreg()
739 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
747 if (reg_val_offs) in amdgpu_kiq_rreg()
748 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
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| D | amdgpu_virt.h | 206 uint32_t reg_val_offs; member
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| D | amdgpu_ring.h | 187 uint32_t reg_val_offs);
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| D | gfx_v9_0.c | 4056 uint32_t seq, reg_val_offs = 0; in gfx_v9_0_kiq_read_clock() local
4064 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in gfx_v9_0_kiq_read_clock()
4077 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4079 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4110 value = (uint64_t)adev->wb.wb[reg_val_offs] | in gfx_v9_0_kiq_read_clock()
4111 (uint64_t)adev->wb.wb[reg_val_offs + 1 ] << 32ULL; in gfx_v9_0_kiq_read_clock()
4112 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
4120 if (reg_val_offs) in gfx_v9_0_kiq_read_clock()
4121 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
5514 uint32_t reg_val_offs) in gfx_v9_0_ring_emit_rreg() argument
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| D | gfx_v8_0.c | 6384 uint32_t reg_val_offs) in gfx_v8_0_ring_emit_rreg() argument
6395 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
6397 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
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| D | gfx_v10_0.c | 8125 uint32_t reg_val_offs) in gfx_v10_0_ring_emit_rreg() argument
8136 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
8138 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
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