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Searched refs:reg_set (Results 1 – 24 of 24) sorted by relevance

/Linux-v5.10/drivers/scsi/mvsas/
Dmv_sas.h64 #define SATA_RECEIVED_FIS_LIST(reg_set) \ argument
65 ((void *) mvi->rx_fis + mvi->chip->fis_offs + 0x100 * reg_set)
66 #define SATA_RECEIVED_SDB_FIS(reg_set) \ argument
67 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x58)
68 #define SATA_RECEIVED_D2H_FIS(reg_set) \ argument
69 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x40)
70 #define SATA_RECEIVED_PIO_FIS(reg_set) \ argument
71 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x20)
72 #define SATA_RECEIVED_DMA_FIS(reg_set) \ argument
73 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x00)
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Dmv_94xx.c667 mvs_94xx_clear_srs_irq(struct mvs_info *mvi, u8 reg_set, u8 clear_all) in mvs_94xx_clear_srs_irq() argument
684 if (reg_set > 31) in mvs_94xx_clear_srs_irq()
689 if (tmp & (1 << (reg_set % 32))) { in mvs_94xx_clear_srs_irq()
690 mv_dprintk("register set 0x%x was stopped.\n", reg_set); in mvs_94xx_clear_srs_irq()
691 if (reg_set > 31) in mvs_94xx_clear_srs_irq()
692 mw32(MVS_INT_STAT_SRS_1, 1 << (reg_set % 32)); in mvs_94xx_clear_srs_irq()
694 mw32(MVS_INT_STAT_SRS_0, 1 << (reg_set % 32)); in mvs_94xx_clear_srs_irq()
744 u8 reg_set = *tfs; in mvs_94xx_free_reg_set() local
749 mvi->sata_reg_set &= ~bit(reg_set); in mvs_94xx_free_reg_set()
750 if (reg_set < 32) in mvs_94xx_free_reg_set()
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Dmv_64xx.c124 mvs_64xx_clear_srs_irq(struct mvs_info *mvi, u8 reg_set, u8 clear_all) in mvs_64xx_clear_srs_irq() argument
136 if (tmp & (1 << (reg_set % 32))) { in mvs_64xx_clear_srs_irq()
138 reg_set); in mvs_64xx_clear_srs_irq()
139 mw32(MVS_INT_STAT_SRS_0, 1 << (reg_set % 32)); in mvs_64xx_clear_srs_irq()
Dmv_sas.c120 u8 reg_set) in mvs_find_dev_by_reg_set() argument
127 if (mvi->devices[dev_no].taskfileset == reg_set) in mvs_find_dev_by_reg_set()
/Linux-v5.10/drivers/media/i2c/
Drj54n1cb0c.c464 static int reg_set(struct i2c_client *client, const u16 reg, in reg_set() function
506 return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80); in rj54n1_s_stream()
895 ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1); in rj54n1_set_clock()
1035 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); in rj54n1_set_fmt()
1040 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); in rj54n1_set_fmt()
1045 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); in rj54n1_set_fmt()
1050 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); in rj54n1_set_fmt()
1055 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); in rj54n1_set_fmt()
1062 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); in rj54n1_set_fmt()
1069 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); in rj54n1_set_fmt()
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Dak881x.c46 static int reg_set(struct i2c_client *client, const u8 reg, in reg_set() function
172 reg_set(client, AK881X_VIDEO_PROCESS1, vp1, 0xf); in ak881x_s_std_output()
Dmt9m111.c141 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val)) macro
441 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); in mt9m111_reset()
443 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC); in mt9m111_reset()
835 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); in mt9m111_set_autoexposure()
844 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); in mt9m111_set_autowhitebalance()
924 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); in mt9m111_suspend()
926 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC | in mt9m111_suspend()
Dmt9m001.c126 static int reg_set(struct i2c_client *client, const u8 reg, in reg_set() function
519 ret = reg_set(client, MT9M001_READ_OPTIONS2, 0x8000); in mt9m001_s_ctrl()
/Linux-v5.10/drivers/gpio/
Dgpio-mmio.c138 return !!(gc->read_reg(gc->reg_set) & pinmask); in bgpio_get_set()
160 *bits |= gc->read_reg(gc->reg_set) & set_mask; in bgpio_get_set_multiple()
241 gc->write_reg(gc->reg_set, mask); in bgpio_set_with_clear()
258 gc->write_reg(gc->reg_set, gc->bgpio_data); in bgpio_set_set()
310 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set); in bgpio_set_multiple_set()
322 gc->write_reg(gc->reg_set, set_mask); in bgpio_set_multiple_with_clear()
500 gc->reg_set = set; in bgpio_setup_io()
505 gc->reg_set = set; in bgpio_setup_io()
636 gc->bgpio_data = gc->read_reg(gc->reg_set); in bgpio_init()
/Linux-v5.10/drivers/leds/
Dleds-tca6507.c157 int reg_set; /* One bit per register where member
274 tca->reg_set |= (1 << bit); in set_select()
295 tca->reg_set |= 1 << reg; in set_code()
356 set = tca->reg_set; in tca6507_work()
358 tca->reg_set = 0; in tca6507_work()
542 if (tca->reg_set) in led_assign()
610 if (tca->reg_set) in tca6507_gpio_set_value()
786 tca->reg_set = 0x7f; in tca6507_probe()
/Linux-v5.10/drivers/scsi/megaraid/
Dmegaraid_sas_base.c213 struct megasas_register_set __iomem *reg_set);
291 cmd->frame_phys_addr, 0, instance->reg_set); in megasas_issue_dcmd()
440 regs = instance->reg_set; in megasas_enable_intr_xscale()
457 regs = instance->reg_set; in megasas_disable_intr_xscale()
470 return readl(&instance->reg_set->outbound_msg_0); in megasas_read_fw_status_reg_xscale()
482 regs = instance->reg_set; in megasas_clear_intr_xscale()
620 regs = instance->reg_set; in megasas_enable_intr_ppc()
639 regs = instance->reg_set; in megasas_disable_intr_ppc()
652 return readl(&instance->reg_set->outbound_scratch_pad_0); in megasas_read_fw_status_reg_ppc()
664 regs = instance->reg_set; in megasas_clear_intr_ppc()
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Dmegaraid_sas_fusion.c107 (instance, instance->reg_set)) in megasas_adp_reset_wait_for_ready()
168 regs = instance->reg_set; in megasas_enable_intr_fusion()
191 regs = instance->reg_set; in megasas_disable_intr_fusion()
205 regs = instance->reg_set; in megasas_clear_intr_fusion()
265 writeq(req_data, &instance->reg_set->inbound_low_queue_port); in megasas_write_64bit_req_desc()
270 &instance->reg_set->inbound_low_queue_port); in megasas_write_64bit_req_desc()
272 &instance->reg_set->inbound_high_queue_port); in megasas_write_64bit_req_desc()
291 &instance->reg_set->inbound_single_queue_port); in megasas_fire_cmd_fusion()
317 &instance->reg_set->outbound_scratch_pad_2) & 0x00FFFF; in megasas_fusion_update_can_queue()
1074 (instance, &instance->reg_set->outbound_scratch_pad_1); in megasas_ioc_init_fusion()
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Dmegaraid_sas.h2321 struct megasas_register_set __iomem *reg_set; member
/Linux-v5.10/drivers/gpu/drm/i2c/
Dtda998x_drv.c688 reg_set(struct tda998x_priv *priv, u16 reg, u8 val) in reg_set() function
717 reg_set(priv, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR); in tda998x_reset()
844 reg_set(priv, REG_DIP_IF_FLAGS, bit); in tda998x_write_if()
995 reg_set(priv, REG_SOFTRESET, SOFTRESET_AUDIO); in tda998x_audio_mute()
997 reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); in tda998x_audio_mute()
1042 reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS); in tda998x_configure_audio()
1300 reg_set(priv, REG_TX4, TX4_PD_RAM); in tda998x_connector_get_modes()
1544 reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); in tda998x_bridge_mode_set()
1554 reg_set(priv, REG_FEAT_POWERDOWN, FEAT_POWERDOWN_PREFILT); in tda998x_bridge_mode_set()
1587 reg_set(priv, REG_FEAT_POWERDOWN, FEAT_POWERDOWN_CSC); in tda998x_bridge_mode_set()
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/Linux-v5.10/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.c231 unsigned int reg_pupd, reg_set, reg_rst; in mtk_pctrl_spec_pull_set_samereg() local
247 reg_set = spec_pupd_pin->offset + align; in mtk_pctrl_spec_pull_set_samereg()
253 reg_pupd = reg_set; in mtk_pctrl_spec_pull_set_samereg()
267 regmap_write(regmap, reg_set, bit_r0); in mtk_pctrl_spec_pull_set_samereg()
272 regmap_write(regmap, reg_set, bit_r1); in mtk_pctrl_spec_pull_set_samereg()
275 regmap_write(regmap, reg_set, bit_r0); in mtk_pctrl_spec_pull_set_samereg()
276 regmap_write(regmap, reg_set, bit_r1); in mtk_pctrl_spec_pull_set_samereg()
/Linux-v5.10/drivers/gpu/drm/stm/
Dltdc.c251 static inline void reg_set(void __iomem *base, u32 reg, u32 mask) in reg_set() function
436 reg_set(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE); in ltdc_crtc_atomic_enable()
439 reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR); in ltdc_crtc_atomic_enable()
458 reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR); in ltdc_crtc_atomic_disable()
610 reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR); in ltdc_crtc_atomic_flush()
691 reg_set(ldev->regs, LTDC_IER, IER_LIE); in ltdc_crtc_enable_vblank()
1054 reg_set(ldev->regs, LTDC_GCR, GCR_LTDCEN); in ltdc_encoder_enable()
/Linux-v5.10/arch/ia64/include/uapi/asm/
Dperfmon.h87 unsigned short reg_set; /* event set for this register */ member
/Linux-v5.10/drivers/pci/controller/
Dpci-xgene-msi.c144 u32 reg_set = hwirq_to_reg_set(data->hwirq); in xgene_compose_msi_msg() local
146 u64 target_addr = msi->msi_addr + (((8 * group) + reg_set) << 16); in xgene_compose_msi_msg()
/Linux-v5.10/drivers/media/platform/stm32/
Dstm32-dcmi.c193 static inline void reg_set(void __iomem *base, u32 reg, u32 mask) in reg_set() function
378 reg_set(dcmi->regs, DCMI_CR, CR_CAPTURE); in dcmi_start_capture()
402 reg_set(dcmi->regs, DCMI_CR, CR_CROP); in dcmi_set_crop()
485 reg_set(dcmi->regs, DCMI_ICR, IT_FRAME | IT_OVR | IT_ERR); in dcmi_irq_callback()
788 reg_set(dcmi->regs, DCMI_CR, CR_CM);/* Snapshot mode */ in dcmi_start_streaming()
791 reg_set(dcmi->regs, DCMI_CR, CR_ENABLE); in dcmi_start_streaming()
826 reg_set(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR); in dcmi_start_streaming()
828 reg_set(dcmi->regs, DCMI_IER, IT_OVR | IT_ERR); in dcmi_start_streaming()
/Linux-v5.10/arch/arm/net/
Dbpf_jit_32.c1272 u16 reg_set = 0; in emit_push_r64() local
1276 reg_set = (1 << rt[1]) | (1 << rt[0]); in emit_push_r64()
1277 emit(ARM_PUSH(reg_set), ctx); in emit_push_r64()
1289 u16 reg_set = CALLEE_PUSH_MASK | 1 << ARM_IP | 1 << ARM_PC; in build_prologue() local
1291 emit(ARM_PUSH(reg_set), ctx); in build_prologue()
1326 u16 reg_set = CALLEE_POP_MASK | 1 << ARM_SP; in build_epilogue() local
1327 emit(ARM_SUB_I(ARM_SP, ARM_FP, hweight16(reg_set) * 4), ctx); in build_epilogue()
1328 emit(ARM_LDM(ARM_SP, reg_set), ctx); in build_epilogue()
/Linux-v5.10/drivers/gpu/drm/i915/
Dintel_uncore.c89 #define fw_set(d, val) writel(_MASKED_BIT_ENABLE((val)), (d)->reg_set)
90 #define fw_clear(d, val) writel(_MASKED_BIT_DISABLE((val)), (d)->reg_set)
1468 i915_reg_t reg_set, in __fw_domain_init() argument
1483 drm_WARN_ON(&uncore->i915->drm, !i915_mmio_reg_valid(reg_set)); in __fw_domain_init()
1488 d->reg_set = uncore->regs + i915_mmio_reg_offset(reg_set); in __fw_domain_init()
Dintel_uncore.h144 u32 __iomem *reg_set; member
/Linux-v5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_link.c3634 static struct bnx2x_reg_set reg_set[] = { in bnx2x_warpcore_enable_AN_KR2() local
3658 for (i = 0; i < ARRAY_SIZE(reg_set); i++) in bnx2x_warpcore_enable_AN_KR2()
3659 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, in bnx2x_warpcore_enable_AN_KR2()
3660 reg_set[i].val); in bnx2x_warpcore_enable_AN_KR2()
3673 static struct bnx2x_reg_set reg_set[] = { in bnx2x_disable_kr2() local
3693 for (i = 0; i < ARRAY_SIZE(reg_set); i++) in bnx2x_disable_kr2()
3694 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, in bnx2x_disable_kr2()
3695 reg_set[i].val); in bnx2x_disable_kr2()
3735 static struct bnx2x_reg_set reg_set[] = { in bnx2x_warpcore_enable_AN_KR() local
3747 for (i = 0; i < ARRAY_SIZE(reg_set); i++) in bnx2x_warpcore_enable_AN_KR()
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/Linux-v5.10/include/linux/gpio/
Ddriver.h409 void __iomem *reg_set; member