Searched refs:reg_clk_mask (Results 1 – 1 of 1) sorted by relevance
427 u32 reg_clk_mask; /* Mask bit for clock enable */ member458 data |= pclk->param.reg_clk_mask; in xgene_clk_enable()463 pclk->param.reg_clk_offset, pclk->param.reg_clk_mask, in xgene_clk_enable()505 data &= ~pclk->param.reg_clk_mask; in xgene_clk_disable()524 data & pclk->param.reg_clk_mask ? "enabled" : in xgene_clk_is_enabled()530 return data & pclk->param.reg_clk_mask ? 1 : 0; in xgene_clk_is_enabled()709 if (of_property_read_u32(np, "enable-mask", ¶meters.reg_clk_mask)) in xgene_devclk_init()710 parameters.reg_clk_mask = 0xF; in xgene_devclk_init()