/Linux-v5.10/tools/testing/selftests/kvm/lib/x86_64/ |
D | vmx.c | 146 cr0 &= rdmsr(MSR_IA32_VMX_CR0_FIXED1); in prepare_for_vmx_operation() 147 cr0 |= rdmsr(MSR_IA32_VMX_CR0_FIXED0); in prepare_for_vmx_operation() 151 cr4 &= rdmsr(MSR_IA32_VMX_CR4_FIXED1); in prepare_for_vmx_operation() 152 cr4 |= rdmsr(MSR_IA32_VMX_CR4_FIXED0); in prepare_for_vmx_operation() 165 feature_control = rdmsr(MSR_IA32_FEAT_CTL); in prepare_for_vmx_operation() 213 vmwrite(PIN_BASED_VM_EXEC_CONTROL, rdmsr(MSR_IA32_VMX_TRUE_PINBASED_CTLS)); in init_vmcs_control_fields() 220 .ad_enabled = !!(rdmsr(MSR_IA32_VMX_EPT_VPID_CAP) & VMX_EPT_VPID_CAP_AD_BITS), in init_vmcs_control_fields() 231 rdmsr(MSR_IA32_VMX_TRUE_PROCBASED_CTLS) | CPU_BASED_ACTIVATE_SECONDARY_CONTROLS); in init_vmcs_control_fields() 233 vmwrite(CPU_BASED_VM_EXEC_CONTROL, rdmsr(MSR_IA32_VMX_TRUE_PROCBASED_CTLS)); in init_vmcs_control_fields() 241 vmwrite(VM_EXIT_CONTROLS, rdmsr(MSR_IA32_VMX_EXIT_CTLS) | in init_vmcs_control_fields() [all …]
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D | svm.c | 72 efer = rdmsr(MSR_EFER); in generic_svm_setup() 87 save->efer = rdmsr(MSR_EFER); in generic_svm_setup() 94 save->g_pat = rdmsr(MSR_IA32_CR_PAT); in generic_svm_setup() 95 save->dbgctl = rdmsr(MSR_IA32_DEBUGCTLMSR); in generic_svm_setup()
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/Linux-v5.10/drivers/cpufreq/ |
D | longrun.c | 39 rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi); in longrun_get_policy() 46 rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); in longrun_get_policy() 95 rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi); in longrun_set_policy() 107 rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); in longrun_set_policy() 180 rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi); in longrun_determine_freqs() 182 rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi); in longrun_determine_freqs() 187 rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi); in longrun_determine_freqs() 204 rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); in longrun_determine_freqs()
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D | speedstep-lib.c | 75 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); in pentium3_get_frequency() 112 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); in pentiumM_get_frequency() 135 rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp); in pentium_core_get_frequency() 160 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); in pentium_core_get_frequency() 189 rdmsr(0x2c, msr_lo, msr_hi); in pentium4_get_frequency() 345 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi); in speedstep_detect_processor() 358 rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi); in speedstep_detect_processor()
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D | e_powersaver.c | 103 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_get() 115 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_set_state() 119 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_set_state() 131 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_set_state() 143 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_set_state() 199 rdmsr(0x1153, lo, hi); in eps_cpu_init() 204 rdmsr(0x1154, lo, hi); in eps_cpu_init() 241 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_cpu_init()
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/Linux-v5.10/arch/x86/kernel/cpu/mce/ |
D | p5.c | 29 rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi); in pentium_machine_check() 30 rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi); in pentium_machine_check() 62 rdmsr(MSR_IA32_P5_MC_ADDR, l, h); in intel_p5_mcheck_init() 63 rdmsr(MSR_IA32_P5_MC_TYPE, l, h); in intel_p5_mcheck_init()
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/Linux-v5.10/arch/x86/kernel/cpu/mtrr/ |
D | generic.c | 57 rdmsr(MSR_K8_SYSCFG, lo, hi); in k8_check_syscfg_dram_mod_en() 318 rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi); in get_mtrr_var_range() 319 rdmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi); in get_mtrr_var_range() 343 rdmsr(MSR_MTRRfix64K_00000, p[0], p[1]); in get_fixed_ranges() 346 rdmsr(MSR_MTRRfix16K_80000 + i, p[2 + i * 2], p[3 + i * 2]); in get_fixed_ranges() 348 rdmsr(MSR_MTRRfix4K_C0000 + i, p[6 + i * 2], p[7 + i * 2]); in get_fixed_ranges() 471 rdmsr(MSR_MTRRcap, lo, dummy); in get_mtrr_state() 479 rdmsr(MSR_MTRRdefType, lo, dummy); in get_mtrr_state() 487 rdmsr(MSR_K8_TOP_MEM2, low, high); in get_mtrr_state() 543 rdmsr(msr, lo, hi); in set_fixed_range() [all …]
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D | amd.c | 15 rdmsr(MSR_K6_UWCCR, low, high); in amd_get_mtrr() 67 rdmsr(MSR_K6_UWCCR, regs[0], regs[1]); in amd_set_mtrr()
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/Linux-v5.10/tools/testing/selftests/kvm/x86_64/ |
D | user_msr_test.c | 101 GUEST_ASSERT(rdmsr(MSR_SYSCALL_MASK) == MSR_SYSCALL_MASK); in guest_msr_calls() 102 GUEST_ASSERT(rdmsr(MSR_GS_BASE) == MSR_GS_BASE); in guest_msr_calls() 104 GUEST_ASSERT(rdmsr(MSR_SYSCALL_MASK) != MSR_SYSCALL_MASK); in guest_msr_calls() 105 GUEST_ASSERT(rdmsr(MSR_GS_BASE) != MSR_GS_BASE); in guest_msr_calls() 112 rdmsr(MSR_IA32_POWER_CTL); in guest_msr_calls() 115 GUEST_ASSERT(rdmsr(0xdeadbeef) == 0xdeadbeef); in guest_msr_calls()
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D | vmx_preemption_timer_test.c | 88 basic.val = rdmsr(MSR_IA32_VMX_BASIC); in l1_guest_code() 89 ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PINBASED_CTLS in l1_guest_code() 91 ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT_CTLS in l1_guest_code() 112 vmx_pt_rate = rdmsr(MSR_IA32_VMX_MISC) & 0x1F; in l1_guest_code()
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/Linux-v5.10/arch/x86/kernel/ |
D | tsc_msr.c | 181 rdmsr(MSR_PLATFORM_INFO, lo, hi); in cpu_khz_from_msr() 184 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in cpu_khz_from_msr() 189 rdmsr(MSR_FSB_FREQ, lo, hi); in cpu_khz_from_msr()
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/Linux-v5.10/arch/x86/kernel/cpu/ |
D | centaur.c | 32 rdmsr(MSR_VIA_FCR, lo, hi); in init_c3() 40 rdmsr(MSR_VIA_RNG, lo, hi); in init_c3() 54 rdmsr(MSR_VIA_FCR, lo, hi); in init_c3() 184 rdmsr(MSR_IDT_FCR1, lo, hi); in init_centaur()
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D | zhaoxin.c | 30 rdmsr(MSR_ZHAOXIN_FCR57, lo, hi); in init_zhaoxin_cap() 39 rdmsr(MSR_ZHAOXIN_FCR57, lo, hi); in init_zhaoxin_cap()
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D | feat_ctl.c | 39 rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, ign, supported); in init_vmx_capabilities() 45 rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported); in init_vmx_capabilities()
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/Linux-v5.10/arch/x86/oprofile/ |
D | op_model_p4.c | 534 rdmsr(ev->bindings[i].escr_address, escr, high); in pmc_setup_one_p4_counter() 548 rdmsr(p4_counters[VIRT_CTR(stag, ctr)].cccr_address, in pmc_setup_one_p4_counter() 578 rdmsr(MSR_IA32_MISC_ENABLE, low, high); in p4_setup_ctrs() 588 rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); in p4_setup_ctrs() 647 rdmsr(p4_counters[real].cccr_address, low, high); in p4_check_ctrs() 648 rdmsr(p4_counters[real].counter_address, ctr, high); in p4_check_ctrs() 678 rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); in p4_start() 695 rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); in p4_stop()
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/Linux-v5.10/tools/power/cpupower/debug/i386/ |
D | centrino-decode.c | 28 static int rdmsr(unsigned int cpu, unsigned int msr, in rdmsr() function 80 err = rdmsr(cpu, MSR_IA32_PERF_STATUS, &lo, &hi); in decode_live()
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/Linux-v5.10/drivers/ide/ |
D | cs5535.c | 98 rdmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, dummy); in cs5535_set_speed() 108 rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy); in cs5535_set_speed() 112 rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy); in cs5535_set_speed()
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/Linux-v5.10/arch/x86/boot/compressed/ |
D | mem_encrypt.S | 49 rdmsr 93 rdmsr
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D | efi_thunk_64.S | 120 rdmsr 145 rdmsr
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/Linux-v5.10/drivers/ata/ |
D | pata_cs5536.c | 36 #undef rdmsr /* avoid accidental MSR usage on, e.g. x86-64 */ 38 #define rdmsr(x, y, z) do { } while (0) macro 91 rdmsr(MSR_IDE_CFG + reg, *val, dummy); in cs5536_read()
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D | pata_cs5535.c | 113 rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy); in cs5535_set_piomode() 135 rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy); in cs5535_set_dmamode()
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/Linux-v5.10/arch/x86/mm/ |
D | mem_encrypt_boot.S | 114 rdmsr 147 rdmsr
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/Linux-v5.10/drivers/char/hw_random/ |
D | via-rng.c | 153 rdmsr(MSR_VIA_RNG, lo, hi); in via_rng_init() 177 rdmsr(MSR_VIA_RNG, lo, hi); in via_rng_init()
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/Linux-v5.10/drivers/misc/ |
D | cs5535-mfgpt.c | 84 rdmsr(msr, value, dummy); in cs5535_mfgpt_toggle_event() 115 rdmsr(MSR_PIC_ZSEL_LOW, zsel, dummy); in cs5535_mfgpt_set_irq() 129 rdmsr(MSR_PIC_IRQM_LPC, lpc, dummy); in cs5535_mfgpt_set_irq()
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/Linux-v5.10/drivers/hwmon/ |
D | hwmon-vid.c | 241 rdmsr(0x198, dummy, vid); in get_via_model_d_vrm() 244 rdmsr(0x1154, brand, dummy); in get_via_model_d_vrm()
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