| /Linux-v5.10/arch/powerpc/net/ |
| D | bpf_jit_comp.c | 78 EMIT(PPC_RAW_LI(r_A, 0)); in bpf_jit_build_prologue()
137 EMIT(PPC_RAW_ADD(r_A, r_A, r_X)); in bpf_jit_build_body()
142 EMIT(PPC_RAW_ADDI(r_A, r_A, IMM_L(K))); in bpf_jit_build_body()
144 EMIT(PPC_RAW_ADDIS(r_A, r_A, IMM_HA(K))); in bpf_jit_build_body()
148 EMIT(PPC_RAW_SUB(r_A, r_A, r_X)); in bpf_jit_build_body()
153 EMIT(PPC_RAW_ADDI(r_A, r_A, IMM_L(-K))); in bpf_jit_build_body()
155 EMIT(PPC_RAW_ADDIS(r_A, r_A, IMM_HA(-K))); in bpf_jit_build_body()
159 EMIT(PPC_RAW_MULW(r_A, r_A, r_X)); in bpf_jit_build_body()
163 EMIT(PPC_RAW_MULI(r_A, r_A, K)); in bpf_jit_build_body()
166 EMIT(PPC_RAW_MULW(r_A, r_A, r_scratch1)); in bpf_jit_build_body()
[all …]
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| D | bpf_jit_asm.S | 44 lwbrx r_A, r_D, r_addr
46 lwzx r_A, r_D, r_addr
60 lhbrx r_A, r_D, r_addr
62 lhzx r_A, r_D, r_addr
74 lbzx r_A, r_D, r_addr
104 PPC_STL r_A, (BPF_PPC_STACK_BASIC+(0*REG_SZ))(r1); \
116 PPC_LL r_A, (BPF_PPC_STACK_BASIC+(0*REG_SZ))(r1); \
127 lwz r_A, BPF_PPC_STACK_BASIC+(2*REG_SZ)(r1)
132 lhz r_A, BPF_PPC_STACK_BASIC+(2*8)(r1)
137 lbz r_A, BPF_PPC_STACK_BASIC+(2*8)(r1)
[all …]
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| D | bpf_jit32.h | 53 #define r_A 4 macro
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| /Linux-v5.10/arch/mips/net/ |
| D | bpf_jit_asm.S | 66 lw $r_A, 0(t1)
70 wsbh t0, $r_A
71 rotr $r_A, t0, 16
73 sll t0, $r_A, 24
74 srl t1, $r_A, 24
75 srl t2, $r_A, 8
78 andi t1, $r_A, 0xff00
81 or $r_A, t0, t1
94 lhu $r_A, 0(t1)
97 wsbh $r_A, $r_A
[all …]
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| D | bpf_jit.c | 644 emit_jit_reg_move(r_A, r_zero, ctx); in build_prologue()
689 emit_load_imm(r_A, k, ctx); in build_body()
696 emit_load(r_A, r_skb, off, ctx); in build_body()
701 emit_load(r_A, r_M, SCRATCH_OFF(k), ctx); in build_body()
783 emit_andi(r_X, r_A, 0xf, ctx); in build_body()
791 emit_store(r_A, r_M, SCRATCH_OFF(k), ctx); in build_body()
801 emit_addiu(r_A, r_A, k, ctx); in build_body()
806 emit_addu(r_A, r_A, r_X, ctx); in build_body()
811 emit_addiu(r_A, r_A, -k, ctx); in build_body()
816 emit_subu(r_A, r_A, r_X, ctx); in build_body()
[all …]
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| D | bpf_jit.h | 53 #define r_A MIPS_R_S3 macro
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| /Linux-v5.10/arch/sparc/net/ |
| D | bpf_jit_comp_32.c | 113 *prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A); \
140 *prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A); \
161 _insn |= RS1(r_A) | RD(r_A); \
388 emit_clear(r_A); /* A = 0 */ in bpf_jit_compile()
471 emit_clear(r_A); in bpf_jit_compile()
490 emit_clear(r_A); in bpf_jit_compile()
492 emit_loadimm(K, r_A); in bpf_jit_compile()
510 emit_reg_move(r_A, O0); /* delay slot */ in bpf_jit_compile()
514 emit_reg_move(r_A, r_X); in bpf_jit_compile()
518 emit_reg_move(r_X, r_A); in bpf_jit_compile()
[all …]
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| D | bpf_jit_asm_32.S | 29 ld [r_TMP], r_A
41 or r_OFF, r_TMP2, r_A
58 lduh [r_TMP], r_A
64 or r_OFF, r_TMP2, r_A
77 ldub [r_SKB_DATA + r_OFF], r_A
107 ld [%sp + SCRATCH_OFF], r_A
113 lduh [%sp + SCRATCH_OFF], r_A
119 ldub [%sp + SCRATCH_OFF], r_A
125 ldub [%sp + SCRATCH_OFF], r_A
154 ld [r_TMP], r_A
[all …]
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| D | bpf_jit_32.h | 34 #define r_A O1 macro
59 #define r_A %o1 macro
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