Searched refs:post_div_max (Results 1 – 3 of 3) sorted by relevance
126 unsigned post_div_min, post_div_max, post_div; in amdgpu_pll_compute() local155 post_div_max = pll->post_div; in amdgpu_pll_compute()178 post_div_max = vco_max / target_clock; in amdgpu_pll_compute()179 if ((target_clock * post_div_max) > vco_max) in amdgpu_pll_compute()180 --post_div_max; in amdgpu_pll_compute()181 if (post_div_max > pll->max_post_div) in amdgpu_pll_compute()182 post_div_max = pll->max_post_div; in amdgpu_pll_compute()196 post_div_best = post_div_max; in amdgpu_pll_compute()199 for (post_div = post_div_min; post_div <= post_div_max; ++post_div) { in amdgpu_pll_compute()
970 unsigned post_div_min, post_div_max, post_div; in radeon_compute_pll_avivo() local1002 post_div_max = pll->post_div; in radeon_compute_pll_avivo()1025 post_div_max = vco_max / target_clock; in radeon_compute_pll_avivo()1026 if ((target_clock * post_div_max) > vco_max) in radeon_compute_pll_avivo()1027 --post_div_max; in radeon_compute_pll_avivo()1028 if (post_div_max > pll->max_post_div) in radeon_compute_pll_avivo()1029 post_div_max = pll->max_post_div; in radeon_compute_pll_avivo()1043 post_div_best = post_div_max; in radeon_compute_pll_avivo()1046 for (post_div = post_div_min; post_div <= post_div_max; ++post_div) { in radeon_compute_pll_avivo()
118 const int post_div_max = 7; in mgag200_g200_set_plls() local142 p <= post_div_max && f_vco < p_clk_min; in mgag200_g200_set_plls()
