Searched refs:pllsw (Results 1 – 1 of 1) sorted by relevance
455 u32 pllsw; member1259 val |= (PRCM_CLK_MGT_CLKEN | clk_mgt[clock].pllsw); in request_clock()1261 clk_mgt[clock].pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK); in request_clock()1437 u32 pllsw; in clock_rate() local1448 val |= clk_mgt[clock].pllsw; in clock_rate()1449 pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK); in clock_rate()1451 if (pllsw == PRCM_CLK_MGT_CLKPLLSW_SOC0) in clock_rate()1453 else if (pllsw == PRCM_CLK_MGT_CLKPLLSW_SOC1) in clock_rate()1455 else if (pllsw == PRCM_CLK_MGT_CLKPLLSW_DDR) in clock_rate()1602 src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), in round_clock_rate()[all …]
