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Searched refs:pll_base (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.10/arch/mips/ath79/
Dclock.c93 static void __init ar71xx_clocks_init(void __iomem *pll_base) in ar71xx_clocks_init() argument
105 pll = __raw_readl(pll_base + AR71XX_PLL_REG_CPU_CONFIG); in ar71xx_clocks_init()
124 static void __init ar724x_clocks_init(void __iomem *pll_base) in ar724x_clocks_init() argument
131 pll = __raw_readl(pll_base + AR724X_PLL_REG_CPU_CONFIG); in ar724x_clocks_init()
144 static void __init ar933x_clocks_init(void __iomem *pll_base) in ar933x_clocks_init() argument
165 clock_ctrl = __raw_readl(pll_base + AR933X_PLL_CLOCK_CTRL_REG); in ar933x_clocks_init()
178 cpu_config = __raw_readl(pll_base + AR933X_PLL_CPU_CONFIG_REG); in ar933x_clocks_init()
232 static void __init ar934x_clocks_init(void __iomem *pll_base) in ar934x_clocks_init() argument
265 pll = __raw_readl(pll_base + AR934X_PLL_CPU_CONFIG_REG); in ar934x_clocks_init()
292 pll = __raw_readl(pll_base + AR934X_PLL_DDR_CONFIG_REG); in ar934x_clocks_init()
[all …]
/Linux-v5.10/drivers/clk/imx/
Dclk-imx5.c307 void __iomem *pll_base; in mx50_clocks_init() local
310 pll_base = ioremap(MX53_DPLL1_BASE, SZ_16K); in mx50_clocks_init()
311 WARN_ON(!pll_base); in mx50_clocks_init()
312 clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base); in mx50_clocks_init()
314 pll_base = ioremap(MX53_DPLL2_BASE, SZ_16K); in mx50_clocks_init()
315 WARN_ON(!pll_base); in mx50_clocks_init()
316 clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base); in mx50_clocks_init()
318 pll_base = ioremap(MX53_DPLL3_BASE, SZ_16K); in mx50_clocks_init()
319 WARN_ON(!pll_base); in mx50_clocks_init()
320 clk[IMX5_CLK_PLL3_SW] = imx_clk_pllv2("pll3_sw", "osc", pll_base); in mx50_clocks_init()
[all …]
/Linux-v5.10/drivers/gpu/drm/omapdrm/dss/
Dvideo-pll.c142 void __iomem *pll_base, *clkctrl_base; in dss_video_pll_init() local
150 pll_base = devm_ioremap_resource(&pdev->dev, res); in dss_video_pll_init()
151 if (IS_ERR(pll_base)) in dss_video_pll_init()
152 return ERR_CAST(pll_base); in dss_video_pll_init()
183 pll->base = pll_base; in dss_video_pll_init()
Ddsi.c323 void __iomem *pll_base; member
443 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
457 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg()
5029 pll->base = dsi->pll_base; in dsi_init_pll_data()
5309 dsi->pll_base = devm_ioremap_resource(dev, res); in dsi_probe()
5310 if (IS_ERR(dsi->pll_base)) in dsi_probe()
5311 return PTR_ERR(dsi->pll_base); in dsi_probe()
/Linux-v5.10/drivers/video/fbdev/omap2/omapfb/dss/
Dvideo-pll.c134 void __iomem *pll_base, *clkctrl_base; in dss_video_pll_init() local
148 pll_base = devm_ioremap_resource(&pdev->dev, res); in dss_video_pll_init()
149 if (IS_ERR(pll_base)) { in dss_video_pll_init()
151 return ERR_CAST(pll_base); in dss_video_pll_init()
191 pll->base = pll_base; in dss_video_pll_init()
Ddsi.c294 void __iomem *pll_base; member
440 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
456 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg()
5226 pll->base = dsi->pll_base; in dsi_init_pll_data()
5351 dsi->pll_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind()
5353 if (!dsi->pll_base) { in dsi_bind()
/Linux-v5.10/drivers/clk/
Dclk-bm1880.c63 void __iomem *pll_base; member
538 void __iomem *pll_base = data->pll_base; in bm1880_clk_register_plls() local
544 hw = bm1880_clk_register_pll(bm1880_clk, pll_base); in bm1880_clk_register_plls()
893 void __iomem *pll_base, *sys_base; in bm1880_clk_probe() local
899 pll_base = devm_ioremap_resource(&pdev->dev, res); in bm1880_clk_probe()
900 if (IS_ERR(pll_base)) in bm1880_clk_probe()
901 return PTR_ERR(pll_base); in bm1880_clk_probe()
919 clk_data->pll_base = pll_base; in bm1880_clk_probe()
/Linux-v5.10/Documentation/devicetree/bindings/display/msm/
Dedp.txt9 * "pll_base"
33 "pll_base";
/Linux-v5.10/drivers/clk/st/
Dclkgen-pll.c693 void __iomem *pll_base; in clkgen_c32_pll_setup() local
703 pll_base = clkgen_get_register_base(np); in clkgen_c32_pll_setup()
704 if (!pll_base) in clkgen_c32_pll_setup()
709 clk = clkgen_pll_register(parent_name, data, pll_base, pll_flags, in clkgen_c32_pll_setup()
740 clk = clkgen_odf_register(pll_name, pll_base, data, odf_flags, in clkgen_c32_pll_setup()
/Linux-v5.10/arch/arm/mach-tegra/
Dsleep-tegra20.S46 .macro pll_enable, rd, r_car_base, pll_base
47 ldr \rd, [\r_car_base, #\pll_base]
50 streq \rd, [\r_car_base, #\pll_base]
Dsleep-tegra30.S90 .macro pll_enable, rd, r_car_base, pll_base, pll_misc
91 ldr \rd, [\r_car_base, #\pll_base]
94 streq \rd, [\r_car_base, #\pll_base]
107 .macro pll_locked, rd, r_car_base, pll_base
109 ldr \rd, [\r_car_base, #\pll_base]