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Searched refs:pll_a (Results 1 – 25 of 32) sorted by relevance

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/Linux-v5.10/Documentation/devicetree/bindings/sound/
Dnvidia,tegra-audio-trimslice.txt7 "pll_a" (The Tegra clock of that name),
20 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-wm9712.txt8 - pll_a
59 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-alc5632.txt8 - pll_a
47 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-wm8753.txt8 - pll_a
38 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-sgtl5000.txt8 - pll_a
41 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-max98090.txt8 - pll_a
52 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-rt5640.txt8 - pll_a
51 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-wm8903.txt8 - pll_a
60 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-rt5677.txt8 - pll_a
66 clock-names = "pll_a", "pll_a_out0", "mclk";
/Linux-v5.10/drivers/gpu/drm/i915/display/
Ddvo_ns2501.c210 u8 pll_a; /* PLL configuration, register A, 1B */ member
237 .pll_a = 17,
257 .pll_a = 25,
276 .pll_a = 11,
614 ns2501_writeb(dvo, NS2501_REG1B, conf->pll_a); in ns2501_mode_set()
/Linux-v5.10/arch/arm/boot/dts/
Dtegra20-plutux.dts60 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-tec.dts69 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-medcom-wide.dts92 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-trimslice.dts455 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-paz00.dts650 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra30-cardhu.dtsi597 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-ventana.dts687 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra124-nyan.dtsi769 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-harmony.dts760 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-colibri.dtsi741 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-seaboard.dts919 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra30-colibri.dtsi1035 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra30-apalis.dtsi1176 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra114-dalmore.dts1278 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra124-venice2.dts1244 clock-names = "pll_a", "pll_a_out0", "mclk";

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