Searched refs:pllPPLL_DIV_0 (Results 1 – 2 of 2) sorted by relevance
678 rinfo->save_regs[92] = INPLL(pllPPLL_DIV_0); in radeon_pm_save_regs()1666 OUTPLL(pllPPLL_DIV_0, rinfo->save_regs[92]); in radeon_pm_restore_pixel_pll()2196 OUTPLL(pllPPLL_DIV_0, rinfo->save_regs[92]); in radeon_reinitialize_M9P()
1900 #define pllPPLL_DIV_0 0x0004 macro
