Searched refs:pllM_SPLL_REF_FB_DIV (Results 1 – 2 of 2) sorted by relevance
665 rinfo->save_regs[77] = INPLL(pllM_SPLL_REF_FB_DIV); in radeon_pm_save_regs()1490 tmp = INPLL(pllM_SPLL_REF_FB_DIV); in radeon_pm_start_mclk_sclk()1492 OUTPLL(pllM_SPLL_REF_FB_DIV, tmp); in radeon_pm_start_mclk_sclk()1525 tmp = INPLL(pllM_SPLL_REF_FB_DIV); in radeon_pm_start_mclk_sclk()1528 OUTPLL(pllM_SPLL_REF_FB_DIV, tmp); in radeon_pm_start_mclk_sclk()1855 OUTPLL(pllM_SPLL_REF_FB_DIV, rinfo->save_regs[77]); in radeon_reinitialize_M10()2085 OUTPLL(pllM_SPLL_REF_FB_DIV, rinfo->save_regs[77]); in radeon_reinitialize_M9P()
1906 #define pllM_SPLL_REF_FB_DIV 0x000A macro
