/Linux-v5.10/drivers/media/cec/core/ |
D | cec-pin.c | 111 static void cec_pin_update(struct cec_pin *pin, bool v, bool force) in cec_pin_update() argument 113 if (!force && v == pin->adap->cec_pin_is_high) in cec_pin_update() 116 pin->adap->cec_pin_is_high = v; in cec_pin_update() 117 if (atomic_read(&pin->work_pin_num_events) < CEC_NUM_PIN_EVENTS) { in cec_pin_update() 120 if (pin->work_pin_events_dropped) { in cec_pin_update() 121 pin->work_pin_events_dropped = false; in cec_pin_update() 124 pin->work_pin_events[pin->work_pin_events_wr] = ev; in cec_pin_update() 125 pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get(); in cec_pin_update() 126 pin->work_pin_events_wr = in cec_pin_update() 127 (pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS; in cec_pin_update() [all …]
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D | cec-pin-error-inj.c | 49 u16 cec_pin_rx_error_inj(struct cec_pin *pin) in cec_pin_rx_error_inj() argument 54 if (!(pin->error_inj[cmd] & CEC_ERROR_INJ_RX_MASK) && in cec_pin_rx_error_inj() 55 pin->rx_bit >= 18) in cec_pin_rx_error_inj() 56 cmd = pin->rx_msg.msg[1]; in cec_pin_rx_error_inj() 57 return (pin->error_inj[cmd] & CEC_ERROR_INJ_RX_MASK) ? cmd : in cec_pin_rx_error_inj() 61 u16 cec_pin_tx_error_inj(struct cec_pin *pin) in cec_pin_tx_error_inj() argument 65 if (!(pin->error_inj[cmd] & CEC_ERROR_INJ_TX_MASK) && in cec_pin_tx_error_inj() 66 pin->tx_msg.len > 1) in cec_pin_tx_error_inj() 67 cmd = pin->tx_msg.msg[1]; in cec_pin_tx_error_inj() 68 return (pin->error_inj[cmd] & CEC_ERROR_INJ_TX_MASK) ? cmd : in cec_pin_tx_error_inj() [all …]
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/Linux-v5.10/arch/arm/boot/dts/ |
D | sama5d3_lcd.dtsi | 60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
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D | exynos4412-pinctrl.dtsi | 3 * Samsung's Exynos4412 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos4412 SoCs pin-mux and pin-config optiosn are listed as device 17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \ 18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \ 128 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 129 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 135 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 136 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; [all …]
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D | s5pv210-pinctrl.dtsi | 24 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \ 25 samsung,pin-pud-pdn = <S3C64XX_PIN_PULL_ ##_pull>; \ 283 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 284 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 285 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 290 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 291 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 292 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 297 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 298 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; [all …]
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D | exynos4210-pinctrl.dtsi | 3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source 10 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device 147 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 148 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 155 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 161 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 162 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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D | exynos5420-pinctrl.dtsi | 3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device 63 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 65 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 70 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 72 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 162 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 163 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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D | exynos5250-pinctrl.dtsi | 3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device 202 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 209 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 210 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 216 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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D | exynos5260-pinctrl.dtsi | 3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device 201 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 202 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 203 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; 208 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 209 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 210 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; 215 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 216 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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D | s3c64xx-pinctrl.dtsi | 4 * - pin control-related definitions 8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are 136 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 142 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 148 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 155 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; [all …]
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D | exynos3250-pinctrl.dtsi | 3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as device 17 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \ 18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \ 19 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \ 25 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \ 26 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \ 27 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \ 33 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \ 34 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \ [all …]
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D | at91sam9x5_lcd.dtsi | 63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
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D | exynos5410-pinctrl.dtsi | 3 * Exynos5410 SoC pin-mux and pin-config device tree source 282 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 283 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 284 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 289 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 290 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 291 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 296 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 297 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 298 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; [all …]
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/Linux-v5.10/drivers/pinctrl/renesas/ |
D | pinctrl-rza1.c | 82 u8 pin: 4; member 99 u16 pin: 4; member 126 { .pin = 0, .func = 1 }, 127 { .pin = 1, .func = 1 }, 128 { .pin = 2, .func = 1 }, 129 { .pin = 3, .func = 1 }, 130 { .pin = 4, .func = 1 }, 131 { .pin = 5, .func = 1 }, 132 { .pin = 6, .func = 1 }, 133 { .pin = 7, .func = 1 }, [all …]
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/Linux-v5.10/drivers/pinctrl/qcom/ |
D | pinctrl-ssbi-mpp.c | 165 struct pm8xxx_pin_data *pin) in pm8xxx_mpp_update() argument 173 switch (pin->mode) { in pm8xxx_mpp_update() 175 if (pin->dtest) { in pm8xxx_mpp_update() 177 ctrl = pin->dtest - 1; in pm8xxx_mpp_update() 178 } else if (pin->input && pin->output) { in pm8xxx_mpp_update() 180 if (pin->high_z) in pm8xxx_mpp_update() 182 else if (pin->pullup == 600) in pm8xxx_mpp_update() 184 else if (pin->pullup == 10000) in pm8xxx_mpp_update() 188 } else if (pin->input) { in pm8xxx_mpp_update() 190 if (pin->dtest) in pm8xxx_mpp_update() [all …]
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D | pinctrl-ssbi-gpio.c | 126 struct pm8xxx_pin_data *pin, int bank) in pm8xxx_read_bank() argument 131 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_read_bank() 137 ret = regmap_read(pctrl->regmap, pin->reg, &val); in pm8xxx_read_bank() 147 struct pm8xxx_pin_data *pin, in pm8xxx_write_bank() argument 156 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_write_bank() 226 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data; in pm8xxx_pinmux_set_mux() local 229 pin->function = function; in pm8xxx_pinmux_set_mux() 230 val = pin->function << 1; in pm8xxx_pinmux_set_mux() 232 pm8xxx_write_bank(pctrl, pin, 4, val); in pm8xxx_pinmux_set_mux() 249 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_get() local [all …]
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/Linux-v5.10/arch/arm64/boot/dts/exynos/ |
D | exynos5433-pinctrl.dtsi | 3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device 17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \ 18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \ 19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \ 134 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 135 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 136 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>; 141 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 142 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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D | exynos7-pinctrl.dtsi | 3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as 189 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 191 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 196 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 198 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 203 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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/Linux-v5.10/drivers/pinctrl/aspeed/ |
D | pinmux-aspeed.h | 595 #define SIG_EXPR_LIST_ALIAS(pin, sig, group) \ argument 597 SIG_EXPR_LIST_SYM(pin, sig)[ARRAY_SIZE(SIG_EXPR_LIST_SYM(sig, group))] \ 613 #define SIG_EXPR_LIST_DECL_SESG(pin, sig, func, ...) \ argument 617 SIG_EXPR_LIST_ALIAS(pin, sig, func) 629 #define SIG_EXPR_LIST_DECL_SEMG(pin, sig, group, func, ...) \ argument 633 SIG_EXPR_LIST_ALIAS(pin, sig, group) 645 #define SIG_EXPR_LIST_DECL_DESG(pin, sig, f0, f1) \ argument 649 SIG_EXPR_LIST_ALIAS(pin, sig, f0) 653 #define PIN_EXPRS_SYM(pin) pin_exprs_ ## pin argument 654 #define PIN_EXPRS_PTR(pin) (&PIN_EXPRS_SYM(pin)[0]) argument [all …]
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/Linux-v5.10/arch/arm64/boot/dts/actions/ |
D | s900-bubblegum-96.dts | 69 * NC = not connected (pin out but not routed from the chip to 71 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 94 "GPIO-A", /* GPIO_0, LSEC pin 23 */ 95 "GPIO-B", /* GPIO_1, LSEC pin 24 */ 96 "GPIO-C", /* GPIO_2, LSEC pin 25 */ 97 "GPIO-D", /* GPIO_3, LSEC pin 26 */ 98 "GPIO-E", /* GPIO_4, LSEC pin 27 */ 99 "GPIO-F", /* GPIO_5, LSEC pin 28 */ 100 "GPIO-G", /* GPIO_6, LSEC pin 29 */ 101 "GPIO-H", /* GPIO_7, LSEC pin 30 */ [all …]
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/Linux-v5.10/arch/arm/mach-orion5x/ |
D | board-rd88f5182.c | 42 int pin; in rd88f5182_pci_preinit() local 47 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; in rd88f5182_pci_preinit() 48 if (gpio_request(pin, "PCI IntA") == 0) { in rd88f5182_pci_preinit() 49 if (gpio_direction_input(pin) == 0) { in rd88f5182_pci_preinit() 50 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); in rd88f5182_pci_preinit() 53 "set_irq_type pin %d\n", pin); in rd88f5182_pci_preinit() 54 gpio_free(pin); in rd88f5182_pci_preinit() 57 printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin); in rd88f5182_pci_preinit() 60 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; in rd88f5182_pci_preinit() 61 if (gpio_request(pin, "PCI IntB") == 0) { in rd88f5182_pci_preinit() [all …]
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/Linux-v5.10/drivers/pinctrl/mediatek/ |
D | pinctrl-mtk-common.c | 54 unsigned long pin) in mtk_get_regmap() argument 56 if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end) in mtk_get_regmap() 61 static unsigned int mtk_get_port(struct mtk_pinctrl *pctl, unsigned long pin) in mtk_get_port() argument 64 return ((pin >> 4) & pctl->devdata->port_mask) in mtk_get_port() 109 static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, in mtk_pconf_set_ies_smt() argument 134 return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin), in mtk_pconf_set_ies_smt() 135 pin, pctl->devdata->port_align, value, arg); in mtk_pconf_set_ies_smt() 138 bit = BIT(pin & 0xf); in mtk_pconf_set_ies_smt() 146 reg_addr = SET_ADDR(mtk_get_port(pctl, pin) + offset, pctl); in mtk_pconf_set_ies_smt() 148 reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl); in mtk_pconf_set_ies_smt() [all …]
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/Linux-v5.10/arch/arm/mach-s3c/ |
D | pm-s3c24xx.c | 64 static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) in s3c_pm_check_resume_pin() argument 68 int irq = gpio_to_irq(pin); in s3c_pm_check_resume_pin() 75 pinstate = s3c_gpio_getcfg(pin); in s3c_pm_check_resume_pin() 79 S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin); in s3c_pm_check_resume_pin() 82 S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); in s3c_pm_check_resume_pin() 83 s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); in s3c_pm_check_resume_pin() 95 int pin; in s3c_pm_configure_extint() local 102 for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) { in s3c_pm_configure_extint() 103 s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0)); in s3c_pm_configure_extint() 106 for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) { in s3c_pm_configure_extint() [all …]
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/Linux-v5.10/drivers/gpio/ |
D | gpio-zevio.c | 60 static inline u32 zevio_gpio_port_get(struct zevio_gpio *c, unsigned pin, in zevio_gpio_port_get() argument 63 unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE; in zevio_gpio_port_get() 67 static inline void zevio_gpio_port_set(struct zevio_gpio *c, unsigned pin, in zevio_gpio_port_set() argument 70 unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE; in zevio_gpio_port_set() 75 static int zevio_gpio_get(struct gpio_chip *chip, unsigned pin) in zevio_gpio_get() argument 81 dir = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_DIRECTION); in zevio_gpio_get() 82 if (dir & BIT(ZEVIO_GPIO_BIT(pin))) in zevio_gpio_get() 83 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_INPUT); in zevio_gpio_get() 85 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_OUTPUT); in zevio_gpio_get() 88 return (val >> ZEVIO_GPIO_BIT(pin)) & 0x1; in zevio_gpio_get() [all …]
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D | gpio-vr41xx.c | 114 unsigned int pin; in mask_ack_giuint_low() local 116 pin = GPIO_PIN_OF_IRQ(d->irq); in mask_ack_giuint_low() 117 giu_clear(GIUINTENL, 1 << pin); in mask_ack_giuint_low() 118 giu_write(GIUINTSTATL, 1 << pin); in mask_ack_giuint_low() 172 unsigned int pin; in mask_ack_giuint_high() local 174 pin = GPIO_PIN_OF_IRQ(d->irq) - GIUINT_HIGH_OFFSET; in mask_ack_giuint_high() 175 giu_clear(GIUINTENH, 1 << pin); in mask_ack_giuint_high() 176 giu_write(GIUINTSTATH, 1 << pin); in mask_ack_giuint_high() 225 void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, in vr41xx_set_irq_trigger() argument 230 if (pin < GIUINT_HIGH_OFFSET) { in vr41xx_set_irq_trigger() [all …]
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