Searched refs:of_reset_n_cells (Results 1 – 22 of 22) sorted by relevance
19 if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells)) in mmp_of_reset_xlate()93 unit->rcdev.of_reset_n_cells = 1; in mmp_clk_reset_register()
198 if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells)) in ti_sci_reset_of_xlate()236 data->rcdev.of_reset_n_cells = 2; in ti_sci_reset_probe()
86 priv->rcdev.of_reset_n_cells = 2; in berlin2_reset_probe()
115 priv->rcdev.of_reset_n_cells = 1; in zynqmp_reset_probe()
108 ath79_reset->rcdev.of_reset_n_cells = 1; in ath79_reset_probe()
117 rst->rcdev.of_reset_n_cells = 1; in hsdk_reset_probe()
187 priv->rcdev.of_reset_n_cells = 2; in lantiq_rcu_reset_probe()
208 data->rcdev.of_reset_n_cells = data->soc_data->reset_cell_count; in intel_reset_probe()
102 rcdev->of_reset_n_cells = 1; in reset_controller_register()645 if (WARN_ON(args.args_count != rcdev->of_reset_n_cells)) { in __of_reset_control_get()
255 rc->rcdev.of_reset_n_cells = 2; in npcm_rc_probe()
76 int of_reset_n_cells; member
190 reset_data->rcdev.of_reset_n_cells = 0; in sun4i_a10_display_init()193 reset_data->rcdev.of_reset_n_cells = 1; in sun4i_a10_display_init()
142 reset_data->rcdev.of_reset_n_cells = 0; in sun4i_ve_clk_setup()
72 .of_reset_n_cells = 1,
94 rc->rst.of_reset_n_cells = 2; in hi3660_reset_probe()
106 rstc->rcdev.of_reset_n_cells = 2; in hisi_reset_init()
315 .of_reset_n_cells = 1,
433 psc->rcdev.of_reset_n_cells = 1; in __davinci_psc_register_clocks()
236 mc->reset.of_reset_n_cells = 1; in tegra_mc_reset_setup()
578 reset->rcdev.of_reset_n_cells = 1; in omap_prm_reset_init()
677 priv->rcdev.of_reset_n_cells = 1; in cpg_mssr_reset_controller_register()
1432 .of_reset_n_cells = 1,