/Linux-v5.10/drivers/crypto/qat/qat_common/ |
D | adf_hw_arbiter.c | 49 for (i = 0; i < hw_data->num_engines; i++) in adf_init_arb() 58 for (i = 0; i < hw_data->num_engines; i++) in adf_init_arb() 88 for (i = 0; i < hw_data->num_engines; i++) in adf_exit_arb() 92 for (i = 0; i < hw_data->num_engines; i++) in adf_exit_arb()
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D | adf_accel_devices.h | 143 u8 num_engines; member 158 #define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)
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/Linux-v5.10/drivers/gpu/drm/i915/gem/ |
D | i915_gem_context.c | 248 __free_engines(e, e->num_engines); in free_engines() 322 __free_engines(e, e->num_engines + 1); in default_engines() 329 e->num_engines = max(e->num_engines, engine->legacy_idx); in default_engines() 331 e->num_engines++; in default_engines() 1606 if (idx >= set->engines->num_engines) { in set_engines__load_balance() 1608 idx, set->engines->num_engines); in set_engines__load_balance() 1612 idx = array_index_nospec(idx, set->engines->num_engines); in set_engines__load_balance() 1696 if (idx >= set->engines->num_engines) { in set_engines__bond() 1699 idx, set->engines->num_engines); in set_engines__bond() 1703 idx = array_index_nospec(idx, set->engines->num_engines); in set_engines__bond() [all …]
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D | i915_gem_context_types.h | 40 unsigned int num_engines; member
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D | i915_gem_context.h | 201 else if (likely(idx < e->num_engines && e->engines[idx])) in i915_gem_context_get_engine()
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/Linux-v5.10/drivers/gpu/drm/i915/gt/ |
D | intel_ring_submission.c | 662 const int num_engines = in mi_set_context() local 663 IS_HASWELL(i915) ? engine->gt->info.num_engines - 1 : 0; in mi_set_context() 670 len += 2 + (num_engines ? 4 * num_engines + 6 : 0); in mi_set_context() 687 if (num_engines) { in mi_set_context() 690 *cs++ = MI_LOAD_REGISTER_IMM(num_engines); in mi_set_context() 740 if (num_engines) { in mi_set_context() 744 *cs++ = MI_LOAD_REGISTER_IMM(num_engines); in mi_set_context()
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D | intel_gt_types.h | 115 u8 num_engines; member
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/Linux-v5.10/drivers/gpu/drm/omapdrm/ |
D | omap_dmm_tiler.c | 290 for (i = 0; i < dmm->num_engines; i++) { in omap_dmm_irq_handler() 761 REFILL_BUFFER_SIZE * omap_dmm->num_engines, in omap_dmm_remove() 847 omap_dmm->num_engines = (hwinfo >> 24) & 0x1F; in omap_dmm_probe() 852 atomic_set(&omap_dmm->engine_counter, omap_dmm->num_engines); in omap_dmm_probe() 888 REFILL_BUFFER_SIZE * omap_dmm->num_engines, in omap_dmm_probe() 896 omap_dmm->engines = kcalloc(omap_dmm->num_engines, in omap_dmm_probe() 903 for (i = 0; i < omap_dmm->num_engines; i++) { in omap_dmm_probe()
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D | omap_dmm_priv.h | 176 int num_engines; member
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/Linux-v5.10/drivers/crypto/qat/qat_c3xxxvf/ |
D | adf_c3xxxvf_hw_data.c | 74 hw_data->num_engines = ADF_C3XXXIOV_MAX_ACCELENGINES; in adf_init_hw_data_c3xxxiov()
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/Linux-v5.10/drivers/crypto/qat/qat_c62xvf/ |
D | adf_c62xvf_hw_data.c | 74 hw_data->num_engines = ADF_C62XIOV_MAX_ACCELENGINES; in adf_init_hw_data_c62xiov()
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/Linux-v5.10/drivers/crypto/qat/qat_dh895xccvf/ |
D | adf_dh895xccvf_hw_data.c | 74 hw_data->num_engines = ADF_DH895XCCIOV_MAX_ACCELENGINES; in adf_init_hw_data_dh895xcciov()
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/Linux-v5.10/drivers/gpu/drm/i915/gem/selftests/ |
D | i915_gem_context.c | 308 count = engines->num_engines; in live_parallel_switch() 1353 unsigned long idx, ndwords, dw, num_engines; in igt_ctx_readonly() local 1393 num_engines = 0; in igt_ctx_readonly() 1396 num_engines++; in igt_ctx_readonly() 1445 ndwords, num_engines); in igt_ctx_readonly() 1777 unsigned long num_engines, count; in igt_vm_isolation() local 1831 num_engines = 0; in igt_vm_isolation() 1873 num_engines++; in igt_vm_isolation() 1876 count, num_engines); in igt_vm_isolation()
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D | mock_context.c | 129 engines->num_engines = 1; in live_context_for_engine()
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/Linux-v5.10/drivers/infiniband/hw/hfi1/ |
D | sdma.c | 1295 void sdma_clean(struct hfi1_devdata *dd, size_t num_engines) in sdma_clean() argument 1314 for (i = 0; dd->per_sdma && i < num_engines; ++i) { in sdma_clean() 1369 size_t num_engines = chip_sdma_engines(dd); in sdma_init() local 1381 num_engines = mod_num_sdma; in sdma_init() 1389 chip_sdma_mem_size(dd) / (num_engines * SDMA_BLOCK_SIZE); in sdma_init() 1397 num_engines, descq_cnt); in sdma_init() 1400 dd->per_sdma = kcalloc_node(num_engines, sizeof(*dd->per_sdma), in sdma_init() 1417 for (this_idx = 0; this_idx < num_engines; ++this_idx) { in sdma_init() 1483 dd->sdma_heads_size = L1_CACHE_BYTES * num_engines; in sdma_init() 1504 for (this_idx = 0; this_idx < num_engines; ++this_idx) { in sdma_init() [all …]
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D | sdma.h | 415 void sdma_clean(struct hfi1_devdata *dd, size_t num_engines);
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/Linux-v5.10/drivers/gpu/drm/i915/ |
D | i915_query.c | 118 if (query.num_engines || query.rsvd[0] || query.rsvd[1] || in query_engine_info() 132 query.num_engines++; in query_engine_info()
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/Linux-v5.10/drivers/crypto/qat/qat_c3xxx/ |
D | adf_c3xxx_hw_data.c | 161 hw_data->num_engines = ADF_C3XXX_MAX_ACCELENGINES; in adf_init_hw_data_c3xxx()
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/Linux-v5.10/drivers/crypto/qat/qat_c62x/ |
D | adf_c62x_hw_data.c | 171 hw_data->num_engines = ADF_C62X_MAX_ACCELENGINES; in adf_init_hw_data_c62x()
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/Linux-v5.10/drivers/crypto/qat/qat_dh895xcc/ |
D | adf_dh895xcc_hw_data.c | 184 hw_data->num_engines = ADF_DH895XCC_MAX_ACCELENGINES; in adf_init_hw_data_dh895xcc()
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/Linux-v5.10/drivers/dma/idxd/ |
D | registers.h | 75 u64 num_engines:8; member
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D | idxd.h | 44 int num_engines; member
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D | sysfs.c | 431 engine->group->num_engines--; in engine_group_id_store() 440 prevg->num_engines--; in engine_group_id_store() 442 engine->group->num_engines++; in engine_group_id_store() 555 if (val < 4 * group->num_engines || in group_tokens_allowed_store()
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D | init.c | 247 idxd->max_engines = idxd->hw.engine_cap.num_engines; in idxd_read_caps()
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/Linux-v5.10/drivers/gpu/drm/i915/selftests/ |
D | intel_memory_region.c | 430 ce = engines->engines[order[i] % engines->num_engines]; in igt_gpu_write()
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