Searched refs:msr_base (Results 1 – 4 of 4) sorted by relevance
/Linux-v5.10/arch/x86/kernel/cpu/resctrl/ |
D | core.c | 68 .msr_base = MSR_IA32_L3_CBM_BASE, 85 .msr_base = MSR_IA32_L3_CBM_BASE, 102 .msr_base = MSR_IA32_L3_CBM_BASE, 119 .msr_base = MSR_IA32_L2_CBM_BASE, 136 .msr_base = MSR_IA32_L2_CBM_BASE, 153 .msr_base = MSR_IA32_L2_CBM_BASE, 370 wrmsrl(r->msr_base + i, d->ctrl_val[i]); in mba_wrmsr_amd() 395 wrmsrl(r->msr_base + i, delay_bw_map(d->ctrl_val[i], r)); in mba_wrmsr_intel() 404 wrmsrl(r->msr_base + cbm_idx(r, i), d->ctrl_val[i]); in cat_wrmsr() 930 r->msr_base = MSR_IA32_MBA_THRTL_BASE; in rdt_init_res_defs_intel() [all …]
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D | internal.h | 476 unsigned int msr_base; member
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D | monitor.c | 413 cur_msr = r_mba->msr_base + closid; in update_mba_bw()
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/Linux-v5.10/arch/x86/events/amd/ |
D | uncore.c | 46 u32 msr_base; member 156 hwc->config_base = uncore->msr_base + (2 * hwc->idx); in amd_uncore_add() 157 hwc->event_base = uncore->msr_base + 1 + (2 * hwc->idx); in amd_uncore_add() 382 uncore_nb->msr_base = MSR_F15H_NB_PERF_CTL; in amd_uncore_cpu_up_prepare() 396 uncore_llc->msr_base = MSR_F16H_L2I_PERF_CTL; in amd_uncore_cpu_up_prepare()
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