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Searched refs:mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dgfxhub_v1_0.c43 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v1_0_setup_vm_pt_regs()
382 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32); in gfxhub_v1_0_init()
401 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32; in gfxhub_v1_0_init()
Dmmhub_v1_0.c59 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v1_0_setup_vm_pt_regs()
423 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32); in mmhub_v1_0_init()
442 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32; in mmhub_v1_0_init()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_1_0_offset.h1538 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 macro
Dmmhub_9_1_offset.h1570 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 macro
Dmmhub_9_3_0_offset.h1554 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h1446 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 macro
Dgc_9_1_offset.h1465 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 macro
Dgc_9_2_1_offset.h1403 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 macro